search for: version_support

Displaying 20 results from an estimated 28 matches for "version_support".

Did you mean: version_supported
2019 Sep 17
1
[PATCH 1/3] pci: force disable ASPM before changing the link speed
...: 0x0; > + nvkm_pci_mask(pci, 0x150, 0x180, value); > +} > + > int > g84_pcie_init(struct nvkm_pci *pci) > { > @@ -147,6 +155,7 @@ g84_pci_func = { > .pcie.set_version = g84_pcie_set_version, > .pcie.version = g84_pcie_version, > .pcie.version_supported = g84_pcie_version_supported, > + .pcie.force_aspm_off = g84_pcie_force_aspm_off, > }; > > int > diff --git a/drm/nouveau/nvkm/subdev/pci/g92.c b/drm/nouveau/nvkm/subdev/pci/g92.c > index 48874359d..8c35cc89e 100644 > --- a/drm/nouveau/nvkm/subdev/pci/g92.c > +++ b...
2019 Sep 12
5
[PATCH 0/3] PCIe link change improvements
everything was taken from nvgpu. Main reason for adding is to improve stability of the PCIe link changing code as we might want to depend on it for a workaround fixing our infamous runpm issues on recent laptops Karol Herbst (3): pci: force disable ASPM before changing the link speed pci/gk104: enable dl_mgr safe mode pci/gk104: wait for ltssm idle before changing the link
2019 Sep 12
0
[PATCH 1/3] pci: force disable ASPM before changing the link speed
..._pci *pci, bool status) +{ + /* L0s and L1 */ + u32 value = status ? 0x180 : 0x0; + nvkm_pci_mask(pci, 0x150, 0x180, value); +} + int g84_pcie_init(struct nvkm_pci *pci) { @@ -147,6 +155,7 @@ g84_pci_func = { .pcie.set_version = g84_pcie_set_version, .pcie.version = g84_pcie_version, .pcie.version_supported = g84_pcie_version_supported, + .pcie.force_aspm_off = g84_pcie_force_aspm_off, }; int diff --git a/drm/nouveau/nvkm/subdev/pci/g92.c b/drm/nouveau/nvkm/subdev/pci/g92.c index 48874359d..8c35cc89e 100644 --- a/drm/nouveau/nvkm/subdev/pci/g92.c +++ b/drm/nouveau/nvkm/subdev/pci/g92.c @@ -48,6...
2016 Nov 19
3
[PATCH 0/2] Enable changing PCIe link on G92
one rename and one enable patch. Tested on hardware and confirmed with traces Karol Herbst (2): pci: Rename g94 to g92 pci/g92: Enable changing pcie link speeds drm/nouveau/include/nvkm/subdev/pci.h | 2 +- drm/nouveau/nvkm/engine/device/base.c | 22 +++++++++++----------- drm/nouveau/nvkm/subdev/pci/Kbuild | 2 +- drm/nouveau/nvkm/subdev/pci/{g94.c => g92.c} |
2019 Sep 17
6
[PATCH 0/6] Add workaround for fixing runpm
I merged the both series I sent out recently into one bigger one so that it's more obvious on why all of that is needed. Biggest changes since last sent: * reworked the ASPM patch * removed "pci: add nvkm_pcie_get_speed" patch Please test this on Laptops and report back if it either breaks something or doesn't fix runpm. Thanks Karol Herbst (6): pci: disable ASPM before
2015 Oct 13
12
[PATCH v2 0/9] PCIEs speed change
overall the same as the old stuff, but with better namings and tirivialy improved code here and there Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement generic code for PCIe speed change pci: implement pcie speed change for tesla pci: implement pcie speed change on Fermi pci: implement PCIe speed change for kepler+ bios/perf: parse the pci speed from the
2016 Jan 01
9
[PATCH v4 0/9] PCIe speed changes
overall it is for the most part the same as my older version. I cleaned up some copyright things, so that it is more like the others. Also I moved the print about the max speed supported into preinit and did some other minor cleanups in the 3rd commit. Happy testing (and performance for prime offloading setups) Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement
2019 Sep 23
8
[PATCH 0/8] Add workaround for fixing runpm
Changes since last sent: * add a patch to set the device into DRM_SWITCH_POWER_CHANGING state (can be dropped actually, I thought I was needing it, came up with a different approach and forgot to delete it, doesn't hurt though) * expose information about runtime suspending to nvkm so that we can run the pcie workaround only on runtime suspend Karol Herbst (8): pci: disable ASPM
2019 May 04
0
[PATCH 2/5] pci: enable pcie link changes for pascal
...deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c b/drm/nouveau/nvkm/subdev/pci/gk104.c index e6803050..66489018 100644 --- a/drm/nouveau/nvkm/subdev/pci/gk104.c +++ b/drm/nouveau/nvkm/subdev/pci/gk104.c @@ -23,7 +23,7 @@ */ #include "priv.h" -static int +int gk104_pcie_version_supported(struct nvkm_pci *pci) { return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; @@ -108,7 +108,7 @@ gk104_pcie_lnkctl_speed(struct nvkm_pci *pci) return -1; } -static enum nvkm_pcie_speed +enum nvkm_pcie_speed gk104_pcie_max_speed(struct nvkm_pci *pci) { u32 max_s...
2019 May 07
0
[PATCH v2 2/4] pci: enable pcie link changes for pascal
...deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c b/drm/nouveau/nvkm/subdev/pci/gk104.c index e6803050..66489018 100644 --- a/drm/nouveau/nvkm/subdev/pci/gk104.c +++ b/drm/nouveau/nvkm/subdev/pci/gk104.c @@ -23,7 +23,7 @@ */ #include "priv.h" -static int +int gk104_pcie_version_supported(struct nvkm_pci *pci) { return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; @@ -108,7 +108,7 @@ gk104_pcie_lnkctl_speed(struct nvkm_pci *pci) return -1; } -static enum nvkm_pcie_speed +enum nvkm_pcie_speed gk104_pcie_max_speed(struct nvkm_pci *pci) { u32 max_s...
2019 Sep 13
0
[PATCH v4 1/4] pci: enable pcie link changes for pascal
...etions(-) diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c b/drm/nouveau/nvkm/subdev/pci/gk104.c index 804ef017f..61c4e76e8 100644 --- a/drm/nouveau/nvkm/subdev/pci/gk104.c +++ b/drm/nouveau/nvkm/subdev/pci/gk104.c @@ -25,7 +25,7 @@ #include <subdev/timer.h> -static int +int gk104_pcie_version_supported(struct nvkm_pci *pci) { return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; @@ -110,7 +110,7 @@ gk104_pcie_lnkctl_speed(struct nvkm_pci *pci) return -1; } -static enum nvkm_pcie_speed +enum nvkm_pcie_speed gk104_pcie_max_speed(struct nvkm_pci *pci) { u32 max_s...
2018 Jul 27
0
[PATCH] pci/gp100: Enable changing pcie link speeds
...deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c b/drm/nouveau/nvkm/subdev/pci/gk104.c index e6803050..66489018 100644 --- a/drm/nouveau/nvkm/subdev/pci/gk104.c +++ b/drm/nouveau/nvkm/subdev/pci/gk104.c @@ -23,7 +23,7 @@ */ #include "priv.h" -static int +int gk104_pcie_version_supported(struct nvkm_pci *pci) { return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; @@ -108,7 +108,7 @@ gk104_pcie_lnkctl_speed(struct nvkm_pci *pci) return -1; } -static enum nvkm_pcie_speed +enum nvkm_pcie_speed gk104_pcie_max_speed(struct nvkm_pci *pci) { u32 max_s...
2017 Feb 11
0
[PATCH] pci/g92: Fix rearm
....wr32 = nv40_pci_wr32, + .msi_rearm = nv40_pci_msi_rearm, + + .pcie.init = g84_pcie_init, + .pcie.set_link = g84_pcie_set_link, + + .pcie.max_speed = g84_pcie_max_speed, + .pcie.cur_speed = g84_pcie_cur_speed, + + .pcie.set_version = g84_pcie_set_version, + .pcie.version = g84_pcie_version, + .pcie.version_supported = g92_pcie_version_supported, +}; + +int +g94_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci) +{ + return nvkm_pci_new_(&g94_pci_func, device, index, ppci); +} -- 2.11.1
2011 Feb 11
1
[PATCH 2/3]: Staging: hv: Use native wait primitives
...+++ b/drivers/staging/hv/channel_mgmt.h @@ -289,8 +289,8 @@ struct vmbus_channel_msginfo { struct list_head submsglist; /* Synchronize the request/response if needed */ - struct osd_waitevent *waitevent; - + int wait_condition; + wait_queue_head_t waitevent; union { struct vmbus_channel_version_supported version_supported; struct vmbus_channel_open_result open_result; diff --git a/drivers/staging/hv/connection.c b/drivers/staging/hv/connection.c index ed0976a..51dd362 100644 --- a/drivers/staging/hv/connection.c +++ b/drivers/staging/hv/connection.c @@ -21,6 +21,8 @@ * */ #include <lin...
2011 Feb 11
1
[PATCH 2/3]: Staging: hv: Use native wait primitives
...+++ b/drivers/staging/hv/channel_mgmt.h @@ -289,8 +289,8 @@ struct vmbus_channel_msginfo { struct list_head submsglist; /* Synchronize the request/response if needed */ - struct osd_waitevent *waitevent; - + int wait_condition; + wait_queue_head_t waitevent; union { struct vmbus_channel_version_supported version_supported; struct vmbus_channel_open_result open_result; diff --git a/drivers/staging/hv/connection.c b/drivers/staging/hv/connection.c index ed0976a..51dd362 100644 --- a/drivers/staging/hv/connection.c +++ b/drivers/staging/hv/connection.c @@ -21,6 +21,8 @@ * */ #include <lin...
2019 May 04
10
[PATCH 0/5] Potential fix for runpm issues on various laptops
While investigating the runpm issues on my GP107 I noticed that something inside devinit makes runpm break. If Nouveau loads up to the point right before doing devinit, runpm works without any issues, if devinit is ran, not anymore. Out of curiousity I even tried to "bisect" devinit by not running it on vbios provided signed PMU image, but on the devinit parser we have inside Nouveau.
2019 Sep 13
8
[PATCH v4 0/4] add PCIe workaround to fix runpm on laptops
not much changed since the last time I sent those patches out, but there are a couple of annoying bug fixes, which users would probably never hit unless they do rmmod/modprobe nouveau cycles. Biggest change is that I force the link to a 8.0 speed rather than the speed the GPU came up with. Also this series depends on the PCIe improvement patches I sent out recently. Karol Herbst (4): pci:
2019 Aug 13
3
[PATCH 1/4] pci: enable pcie link changes for pascal
...letions(-) diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c b/drm/nouveau/nvkm/subdev/pci/gk104.c index e68030507..664890185 100644 --- a/drm/nouveau/nvkm/subdev/pci/gk104.c +++ b/drm/nouveau/nvkm/subdev/pci/gk104.c @@ -23,7 +23,7 @@ */ #include "priv.h" -static int +int gk104_pcie_version_supported(struct nvkm_pci *pci) { return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; @@ -108,7 +108,7 @@ gk104_pcie_lnkctl_speed(struct nvkm_pci *pci) return -1; } -static enum nvkm_pcie_speed +enum nvkm_pcie_speed gk104_pcie_max_speed(struct nvkm_pci *pci) { u32 max_s...
2019 May 07
8
[PATCH v2 0/4] Potential fix for runpm issues on various laptops
CCing linux-pci and Bjorn Helgaas. Maybe we could get better insights on how a reasonable fix would look like. Anyway, to me this entire issue looks like something which has to be fixed on a PCI level instead of inside a driver, so it makes sense to ask the pci folks if they have any better suggestions. Original cover letter: While investigating the runpm issues on my GP107 I noticed that
2011 Jan 26
8
[PATCH 1/8] staging: hv: Convert camel cased variables in connection.c to lower cases
...} /* Wait for the connection response */ - osd_waitevent_wait(msgInfo->waitevent); + osd_waitevent_wait(msginfo->waitevent); - list_del(&msgInfo->msglistentry); + list_del(&msginfo->msglistentry); /* Check if successful */ - if (msgInfo->response.version_response.version_supported) { + if (msginfo->response.version_response.version_supported) { DPRINT_INFO(VMBUS, "Vmbus connected!!"); - gVmbusConnection.ConnectState = Connected; + vmbus_connection.ConnectState = Connected; } else { DPRINT_ERR(VMBUS, "Vmbus connection failed!!..." @@ -151,...