search for: verifyliveinterv

...t that BUNDLEd instructions aren't re-written has anything to do with the verification problem. Let me try to simplify what I think is going on. Just after greedy regalloc, we end up with some code like this: ... %vreg1<def> = ... ... ... = %vreg1 ... %vreg1<def> = %vreg1 ... verifyLiveInterval() accepts this code as valid since it sees the second def as part of the same live interval component because ConnectedVNInfoEqClasses::Classify() sees this second def as a "two-addr" redefinition, even though the def and source operands are not tied. MachineCopyProp (pre-rewrite)...

...en has anything to do with the verification problem. Let me try to simplify what I think is going on. Just after greedy regalloc, we end up with some code like this: > > ... > %vreg1<def> = ... > ... > ... = %vreg1 > ... > %vreg1<def> = %vreg1 > ... > > verifyLiveInterval() accepts this code as valid since it sees the second def as part of the same live interval component because ConnectedVNInfoEqClasses::Classify() sees this second def as a "two-addr" redefinition, even though the def and source operands are not tied. > > MachineCopyProp (pre-rew...

> On Sep 26, 2017, at 3:33 PM, Geoff Berry <gberry at codeaurora.org> wrote: > > > > On 9/26/2017 6:11 PM, Matthias Braun wrote: >>> On Sep 26, 2017, at 2:39 PM, Geoff Berry via llvm-dev <llvm-dev at lists.llvm.org> wrote: >>> >>> Hi all, >>> >>> Mikael reported a machine verification failure in his out-of-tree target

On 9/26/2017 6:11 PM, Matthias Braun wrote: > >> On Sep 26, 2017, at 2:39 PM, Geoff Berry via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Hi all, >> >> Mikael reported a machine verification failure in his out-of-tree target with the MachineCopyPropagation changes to forward registers (which is currently reverted). The verification in question is: