Displaying 3 results from an estimated 3 matches for "venur2005".
2020 Apr 08
3
Error with perf2bolt in LLVM BOLT
Hi,
I was interested in trying out LLVM BOLT and generated profile data using
Linux perf using the following:
perf record -e cycles:u -o perf.data <command>
This is without the use of LBR so I understand the performance improvements
may not be much but this was more for becoming familiar with BOLT's
commands.
I then run:
perf2bolt -nl -p perf.data -o perf.fdata <binary>
and I
2017 Nov 24
2
Reaching definitions on Machine IR post register allocation
...possibly due to the fact that my change is incorrect or
incomplete. Apart from adding extra register units, do you need to do
anything else?
If you have the changes you made, I would be grateful if you can share it.
Thanks.
Regards,
Venu.
On Tue, Nov 14, 2017 at 8:54 AM, Venugopal Raghavan <venur2005 at gmail.com>
wrote:
> Hi Krzysztof,
>
> Thanks for the reply.
>
> Since a data flow edge is missing, I thought that it could be a
> correctness issue and not just a precision issue. But, on second thoughts,
> maybe it isn't because the edge from the implicit def to the...
2017 Nov 13
2
Reaching definitions on Machine IR post register allocation
Hi Venu,
This is happening because there is an implicit def of ECX on the COPY
instruction. This was an issue on Hexagon as well. Let me give you some
background. There are two kinds of implicit defs (and implicit uses, but
I'll refer only to defs for brevity):
(1) Those that indicate that some physical register (that is not an
operand) is modified by a given instruction (EFLAGS is a good