Displaying 3 results from an estimated 3 matches for "vecvalue".
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2014 Aug 07
3
[LLVMdev] MCJIT generates MOVAPS on unaligned address
...a layout (http://llvm.org/docs/LangRef.html#data-layout) that specifies f32:32:32.
>
> case Instruction::Store: {
> StoreInst *SI = cast<StoreInst>(VL0);
> unsigned Alignment = SI->getAlignment();
> ...
> StoreInst *S = Builder.CreateStore(VecValue, VecPtr);
> if (!Alignment)
> Alignment = DL->getABITypeAlignment(SI->getPointerOperand()->getType()); // << Get the 4byte alignment for the scalar float store from the data layout string.
> S->setAlignment(Alignment);
-------------- next part ---...
2014 Aug 07
2
[LLVMdev] MCJIT generates MOVAPS on unaligned address
...html#data-layout) that specifies f32:32:32.
>>>
>>> case Instruction::Store: {
>>> StoreInst *SI = cast<StoreInst>(VL0);
>>> unsigned Alignment = SI->getAlignment();
>>> ...
>>> StoreInst *S = Builder.CreateStore(VecValue, VecPtr);
>>> if (!Alignment)
>>> Alignment = DL->getABITypeAlignment(SI->getPointerOperand()->getType()); // << Get the 4byte alignment for the scalar float store from the data layout string.
>>> S->setAlignment(Alignment);
>>
&g...
2014 Aug 07
3
[LLVMdev] MCJIT generates MOVAPS on unaligned address
MCJIT when lowering to x86-64 generates a MOVAPS (Move Aligned Packed
Single-Precision Floating-Point Values) on a non-aligned memory address:
movaps 88(%rdx), %xmm0
where %rdx comes in as a function argument with only natural alignment
(float*). This x86 instruction requires the memory address to be 16 byte
aligned which 88 plus something aligned to 4 byte isn't.
Here the