Displaying 5 results from an estimated 5 matches for "vectorreg".
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vectoring
2013 May 10
4
[LLVMdev] Predicated Vector Operations
...earlier in the thread,
> but it didn't click at the time. It sounds like I can do instruction
> selection with a pattern like (omitting selection of the sources):
>
> let Constraints = "$dst = $oldvalue" in {
> def MASKEDARITH : MyInstruction<
> (outs VectorReg:$dst),
> (ins MaskReg:$mask, VectorReg:$src1, VectorReg:$src2,
> VectorReg:$oldvalue),
> "add $dst {$mask}, $src1, $src2",
> [(set v16i32:$dst, (vselect v16i1:$mask, (add v16i32:$src1,
> v16i32:$src2), v16i32:$oldvalue))]>;
> }
Ok, but where d...
2013 May 11
0
[LLVMdev] Predicated Vector Operations
...>> but it didn't click at the time. It sounds like I can do instruction
>> selection with a pattern like (omitting selection of the sources):
>>
>> let Constraints = "$dst = $oldvalue" in {
>> def MASKEDARITH : MyInstruction<
>> (outs VectorReg:$dst),
>> (ins MaskReg:$mask, VectorReg:$src1, VectorReg:$src2,
>> VectorReg:$oldvalue),
>> "add $dst {$mask}, $src1, $src2",
>> [(set v16i32:$dst, (vselect v16i1:$mask, (add v16i32:$src1,
>> v16i32:$src2), v16i32:$oldvalue))]>;
>...
2013 May 10
0
[LLVMdev] Predicated Vector Operations
...t it now. This was mentioned earlier in the thread,
but it didn't click at the time. It sounds like I can do instruction
selection with a pattern like (omitting selection of the sources):
let Constraints = "$dst = $oldvalue" in {
def MASKEDARITH : MyInstruction<
(outs VectorReg:$dst),
(ins MaskReg:$mask, VectorReg:$src1, VectorReg:$src2,
VectorReg:$oldvalue),
"add $dst {$mask}, $src1, $src2",
[(set v16i32:$dst, (vselect v16i1:$mask, (add v16i32:$src1,
v16i32:$src2), v16i32:$oldvalue))]>;
}
That's actually pretty clean.
Thanks
On...
2013 May 09
2
[LLVMdev] Predicated Vector Operations
On May 9, 2013, at 3:05 PM, Jeff Bush <jeffbush001 at gmail.com> wrote:
> On Thu, May 9, 2013 at 8:10 AM, <dag at cray.com> wrote:
>> Jeff Bush <jeffbush001 at gmail.com> writes:
>>
>>> %tx = select %mask, %x, <0.0, 0.0, 0.0 ...>
>>> %ty = select %mask, %y, <0.0, 0.0, 0.0 ...>
>>> %sum = fadd %tx, %ty
>>> %newvalue
2013 May 10
0
[LLVMdev] Predicated Vector Operations
...>> but it didn't click at the time. It sounds like I can do instruction
>> selection with a pattern like (omitting selection of the sources):
>>
>> let Constraints = "$dst = $oldvalue" in {
>> def MASKEDARITH : MyInstruction<
>> (outs VectorReg:$dst),
>> (ins MaskReg:$mask, VectorReg:$src1, VectorReg:$src2,
>> VectorReg:$oldvalue),
>> "add $dst {$mask}, $src1, $src2",
>> [(set v16i32:$dst, (vselect v16i1:$mask, (add v16i32:$src1,
>> v16i32:$src2), v16i32:$oldvalue))]>;
>&g...