search for: vectorised

Displaying 20 results from an estimated 376 matches for "vectorised".

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2010 Dec 22
4
vectorised recovery of strsplit value ??
...[[4]] [1] "D1" "4" etc I am now struggling to work with the prefix identifiers (D1, F1, DDC) because the only way I have figured out to access them is with splitIDs[[i]][1] i.e. it seems like I have to use a loop to get the identifiers into a factor and counted. Is there a vectorised solution someone can suggest? Or an alternative strategy .. these are early days using R for me! Thanks regards M -- View this message in context: http://r.789695.n4.nabble.com/vectorised-recovery-of-strsplit-value-tp3161254p3161254.html Sent from the R help mailing list archive at Nabble.c...
2017 Aug 05
2
LLVM Vectorisation Bug
I have matrix multiplication and stencil code. I vectorise it through the following command. opt -S -O3 -force-vector-width=2048 stencil.ll -o stencil_o3.ll in both the examples of matrix mult and stencil it vectorises fine when my loop iterations >2048. but if i keep both iterations and vector width=2048. it produces scalar code IR not vectorizes it. Is it llvm bug? Please help me.
2018 Mar 01
1
[cfe-dev] Disabling vectorisation at '-O3'
Yes, it looks like passing ‘EnableVec’ and ‘EnableSLPVec’ to ‘Args.hasFlag’ should be replaced with ‘false’ and then it has the expected behaviour. MartinO From: cfe-dev [mailto:cfe-dev-bounces at lists.llvm.org] On Behalf Of Martin J. O'Riordan via cfe-dev Sent: 01 March 2018 18:02 To: 'Richard Smith' <richard at metafoo.co.uk> Cc: 'Clang Dev'
2003 Aug 13
6
placing labels in polygon center ?
Dear all, is there any function to calculate the center of a polygon mass in R? Actually I need to find the best location within polygons to place labels. Thanks for any hint Jens Oehlschl?gel -- COMPUTERBILD 15/03: Premium-e-mail-Dienste im Test\ --------...{{dropped}}
2016 Aug 20
2
LLVM flags for Vectorization
Hi, I have been analyzing the LLVM vectorizer by running some benchmarks. For vectorization, I have used the following flags: -O3 -ffast-math -mavx2 Am I missing any other flags which will improve vectorizer performance? Thanks, Santanu Das IIT Hyd -------------- next part -------------- An HTML attachment was scrubbed... URL:
2018 Mar 01
0
[cfe-dev] Disabling vectorisation at '-O3'
Please ignore this thread - I got myself confused, the code is fine - too many long days and nights staring at code. There is an issue, but it is different to what I thought. My command line is not: clang -S -O3 -fno-vectorize -fno-slp-vectorize foo.c but: clang -S -fno-vectorize -fno-slp-vectorize -O3 foo.c The difference was subtly hidden in a much longer argument list
2016 Aug 30
2
Questions on LLVM vectorization diagnostics
Hi Hideki, Thanks for the interesting writeup! > On Aug 27, 2016, at 7:15 AM, Renato Golin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > On 25 August 2016 at 05:46, Saito, Hideki via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> Now, I have one question. Suppose we'd like to split the vectorization decision as an Analysis pass and vectorization
2018 Mar 01
0
[cfe-dev] Disabling vectorisation at '-O3'
No, I’m wrong. I think that bug is actually in ‘hasFlag’ itself. In ‘llvm/lib/Option/ArgList.cpp’ line #70: bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier PosAlias, OptSpecifier Neg, bool Default) const { if (Arg *A = getLastArg(Pos, PosAlias, Neg)) return A->getOption().matches(Pos) || A->getOption().matches(PosAlias); return
2020 May 01
3
LV: predication
Hello, We are working on predication for our vector extension (MVE). Since quite a few people are working on predication and different forms of it (e.g. SVE, RISC-V, NEC), I thought I would share what we would like to add to the loop vectoriser. Hopefully it's just a minor one and not intrusive, but could be interesting and useful for others, and feedback on this is welcome of course. TL;DR:
2006 May 10
1
Mere chat on vectorisation matters
...and how good C would be to write masked conditionals. I'm not familiar enough with modern CPUs to judge if this really needs to be addressed or not. I would not doubt that hardware chaining is worth all the efforts the engineers put so the hardware recognises and activates it on the fly. Vectorised chaining implemented in software as a way to spare memory, may be much of a challenge, as it requires sort of half-compilation. One one hand, it might alleviate memory problems which are often the subject of discussions on R-help; through thrashing, going over real memory and into paging may c...
2005 Jul 21
3
vectorising ifelse()
Hi All, is there any chance of vectorising the two ifelse() statements in the following code: for(i in gp){ new[i,1] = ifelse(srow[i]>0, new[srow[i],zippo[i]], sample(1:100, 1, prob =Y1, rep = T)) new[i,2] = ifelse(drow[i]>0, new[drow[i]>0,zappo[i]], sample(1:100, 1, prob =Y1, rep = T)) } Where I am forced to check if the value of drow and srow are >0 for each line... in
2018 Jan 19
0
: Does OpenMP hints bypass the vectorisation legality check in llvm
Xinmin, > Tom, your understanding is correct per OpenMP SIMD model. Our implementation behaves as you stated. > Which is not part of LLVM main trunk yet. Is that the implementation that is based on the intrinsics in the RFC you and Hal Finkel had sent out to the list? Or is it a different implementation (and if so, is there some plan to merge the two)? Thanks, --Vikram Adve //
2020 Mar 26
5
canonical form loops
Hello, Quick question to see if I haven't missed anything: I would like convert counting down loops, i.e. loops with a constant -1 step value, to counting up loops, because the vectoriser is able to better deal with these loops (see e.g. D76838 that I was discussing today with Ayal). It looks like LoopSimplifyCFG and IndVarSimplify don't do this. So was just curious if I haven't
2015 Jul 01
2
[LLVMdev] C as used/implemented in practice: analysis of responses
...compiler, you'll have to convince *most* <compilerX> engineers to agree on something, and that's not trivial. Moreover, this loop is very easy to vectorise, and that would give me 4x speed improvements for 4-way vectorization. That's too much for compilers to pass. If I create a vectorised loop that goes all the way to 92, I'll have to create a tail loop. If I don't want to create a tail loop, I have to override 'b' (and probably 'c') on a vector write. If I implement the variations where I can do that, the vectoriser will be very happy. People generally like...
2006 Sep 26
2
Vectorise a for loop?
....58508 > The fold values is calculated from the M column which is a log2 value. The calculation is different depending on whether the M value is negative or positive. That is if the gene is down regulated the reciprocal value has to be used to calculate a fold value. Here is my clunky, not vectorised code : # Function to add a fold column to the toptable ttfold<-function(tt) { fold<-NULL for (i in 1:length(tt$M)) { if (tt$M[i] < 0 ) { fold[i]<-1/(2^tt$M[i]) } else { fold[i]<-2^tt$M[i] } } tt<-cbind(tt, fold) } # Add fold column to top tables topa1<-ttfol...
2011 Mar 11
2
[LLVMdev] LLVM vs GCC binary performance
On 11 March 2011 14:53, Duncan Sands <baldrick at free.fr> wrote: > There's no magic bullet.  The things to improve that would give you the most > bang for your buck are probably the code generator and auto-vectorization. > Increasing the number of developers would be helpful. I'm not a GCC expert, but their auto-vectorization is not that great. It may be simple to do basic
2004 Sep 30
1
Vectorising and loop (was Re: optim "a log-likelihood function")
>From: Sundar Dorai-Raj <sundar.dorai-raj at PDF.COM> >Reply-To: sundar.dorai-raj at PDF.COM >To: Zhen Pang <nusbj at hotmail.com> >CC: r-help at stat.math.ethz.ch >Subject: Vectorising and loop (was Re: [R] optim "a log-likelihood >function") >Date: Wed, 29 Sep 2004 18:21:17 -0700 > > > >Zhen Pang wrote: > >> >>I also use
2016 Aug 25
2
Questions on LLVM vectorization diagnostics
Hi, Gerolf. We've been a bit quiet for some time. After listening to feedback on the project internally and externally, we decided to take a more generally accepted community development model ---- building up through a collection of small incremental changes ---- than trying to make a big step forward. That change of course took a bit of time, but we are getting close to the first NFC patch
2020 May 01
5
LV: predication
Hi Eli, > The problem with your proposal, as written, is that the vectorizer is producing the intrinsic. Because we don’t impose any ordering on optimizations before codegen, every optimization pass in LLVM would have to be taught to preserve any @llvm.set.loop.elements.i32 whenever it makes any change. This is completely impractical because the intrinsic isn’t related to anything
2017 Feb 03
2
RFC: Generic IR reductions
...ngs like early-exit vectorization. Simon mentioned this to me >> off-list. Simon, could you comment here if this proposal would work >> for your needs? > > Yes - I’m hoping that we can both vectorise early-out ‘any_of’ predicate tests code and perform early-out breaks from already vectorised cases - nothing I’ve seen suggests this will get in the way. It’s mainly going to be a case of correct recognition in the LV, handling dereference’d arrays etc. and I don’t think these intrinsics will obfuscate these cases/attributes etc. > > Does SVE have an early-out ability or is it an all...