search for: vectorisation

Displaying 20 results from an estimated 376 matches for "vectorisation".

2010 Dec 22
4
vectorised recovery of strsplit value ??
Dear Guru's My first steps with R have ground to a halt! I have a vector of sample identifiers > sampleIDs [1] "D1_1" "D1_2" "D1_3" "D1_4" "D1_5" "D1_6" "D1_7" "D1_8" [9] "D1_9" "D1_10" "D1_11" "D1_12" "F1_13" "F1_14"
2017 Aug 05
2
LLVM Vectorisation Bug
I have matrix multiplication and stencil code. I vectorise it through the following command. opt -S -O3 -force-vector-width=2048 stencil.ll -o stencil_o3.ll in both the examples of matrix mult and stencil it vectorises fine when my loop iterations >2048. but if i keep both iterations and vector width=2048. it produces scalar code IR not vectorizes it. Is it llvm bug? Please help me.
2018 Mar 01
1
[cfe-dev] Disabling vectorisation at '-O3'
...MartinO From: cfe-dev [mailto:cfe-dev-bounces at lists.llvm.org] On Behalf Of Martin J. O'Riordan via cfe-dev Sent: 01 March 2018 18:02 To: 'Richard Smith' <richard at metafoo.co.uk> Cc: 'Clang Dev' <cfe-dev at lists.llvm.org> Subject: Re: [cfe-dev] Disabling vectorisation at '-O3' Thanks Richard, I’ll do that - and I can add it as a bug. It’s almost certainly easy enough to fix, but I wanted to be sure that I wasn’t just making a naïve mistake. MartinO From: Richard Smith [mailto:richard at metafoo.co.uk] Sent: 01 March 2018 17:44 T...
2003 Aug 13
6
placing labels in polygon center ?
Dear all, is there any function to calculate the center of a polygon mass in R? Actually I need to find the best location within polygons to place labels. Thanks for any hint Jens Oehlschl?gel -- COMPUTERBILD 15/03: Premium-e-mail-Dienste im Test\ --------...{{dropped}}
2016 Aug 20
2
LLVM flags for Vectorization
Hi, I have been analyzing the LLVM vectorizer by running some benchmarks. For vectorization, I have used the following flags: -O3 -ffast-math -mavx2 Am I missing any other flags which will improve vectorizer performance? Thanks, Santanu Das IIT Hyd -------------- next part -------------- An HTML attachment was scrubbed... URL:
2018 Mar 01
0
[cfe-dev] Disabling vectorisation at '-O3'
...m: Martin J. O'Riordan [mailto:MartinO at theheart.ie] Sent: 01 March 2018 18:27 To: 'Richard Smith' <richard at metafoo.co.uk>; 'Clang Dev' <cfe-dev at lists.llvm.org> Cc: 'LLVM Developers' <llvm-dev at lists.llvm.org> Subject: RE: [cfe-dev] Disabling vectorisation at '-O3' No, I’m wrong. I think that bug is actually in ‘hasFlag’ itself. In ‘llvm/lib/Option/ArgList.cpp’ line #70: bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier PosAlias, OptSpecifier Neg, bool Default) const { if (Arg *A = getLastArg...
2016 Aug 30
2
Questions on LLVM vectorization diagnostics
...se to the Transformation pass as >> part of Analysis's internal data? We've been operating under the assumption that such Analysis pass behavior is unacceptable. > > Hi Saito, > > First let me say, impressive work you guys are planning for the > vectoriser. Outer loop vectorisation is not an easy task, so feel free > to share your ideas early and often, as that would probably mean a lot > less work for you guys, too. > > Regarding generation of dead code, I don't remember any pass doing > this (though I haven't looked at many). Most passes do some kind...
2018 Mar 01
0
[cfe-dev] Disabling vectorisation at '-O3'
...LVM-Dev. Thanks again, MartinO From: Martin J. O'Riordan [mailto:MartinO at theheart.ie] Sent: 01 March 2018 18:15 To: 'LLVM Developers' <llvm-dev at lists.llvm.org>; 'Richard Smith' <richard at metafoo.co.uk> Subject: RE: [cfe-dev] Disabling vectorisation at '-O3' Yes, it looks like passing ‘EnableVec’ and ‘EnableSLPVec’ to ‘Args.hasFlag’ should be replaced with ‘false’ and then it has the expected behaviour. MartinO From: cfe-dev [mailto:cfe-dev-bounces at lists.llvm.org] On Behalf Of Martin J. O'Riordan via cfe-...
2020 May 01
3
LV: predication
Hello, We are working on predication for our vector extension (MVE). Since quite a few people are working on predication and different forms of it (e.g. SVE, RISC-V, NEC), I thought I would share what we would like to add to the loop vectoriser. Hopefully it's just a minor one and not intrusive, but could be interesting and useful for others, and feedback on this is welcome of course. TL;DR:
2006 May 10
1
Mere chat on vectorisation matters
Hi, people. Allow me to chat a tiny bit on two vectorisation-related matters, in the context of R. I'm curious about if the following ideas have ever been considered, and rejected already. First is about using the so-called Duff's device for partially unrolling loops. I did not overly check in R sources, and am not familiar with them anyway, b...
2005 Jul 21
3
vectorising ifelse()
Hi All, is there any chance of vectorising the two ifelse() statements in the following code: for(i in gp){ new[i,1] = ifelse(srow[i]>0, new[srow[i],zippo[i]], sample(1:100, 1, prob =Y1, rep = T)) new[i,2] = ifelse(drow[i]>0, new[drow[i]>0,zappo[i]], sample(1:100, 1, prob =Y1, rep = T)) } Where I am forced to check if the value of drow and srow are >0 for each line... in
2018 Jan 19
0
: Does OpenMP hints bypass the vectorisation legality check in llvm
...ate: Fri, 19 Jan 2018 17:54:05 +0000 From: "Tian, Xinmin via llvm-dev" <llvm-dev at lists.llvm.org> To: Tom Sun <ps702 at cam.ac.uk>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Does OpenMP hints bypass the vectorisation legality check in llvm Message-ID: <E42C235343FF1744BA43DDCC4DF1F1BAB4589935 at ORSMSX115.amr.corp.intel.com> Content-Type: text/plain; charset="utf-8" Tom, your understanding is correct per OpenMP SIMD model. Our implementation behaves as you stated...
2020 Mar 26
5
canonical form loops
Hello, Quick question to see if I haven't missed anything: I would like convert counting down loops, i.e. loops with a constant -1 step value, to counting up loops, because the vectoriser is able to better deal with these loops (see e.g. D76838 that I was discussing today with Ayal). It looks like LoopSimplifyCFG and IndVarSimplify don't do this. So was just curious if I haven't
2015 Jul 01
2
[LLVMdev] C as used/implemented in practice: analysis of responses
On 1 July 2015 at 17:15, Russell Wallace <russell.wallace at gmail.com> wrote: > I'm proposing that LLVM unilaterally replace most undefined behaviour with > implementation-defined behaviour. That's precisely the problem. Which behaviour? Let's have an example: struct Foo { long a[95]; char b[4]; double c[2]; }; void fuzz(Foo &F) { for (int i=0; i<100;
2006 Sep 26
2
Vectorise a for loop?
Hi R guru coders I wrote a bit of code to add a new column onto a "topTable" dataframe. That is a list of genes processed using the limma package. I used a for loop but I kept feeling there was a better way using a more vector oriented approach. I looked at several commands such as "apply", "by" etc but could not find a good way to do it. I have this feeling there
2011 Mar 11
2
[LLVMdev] LLVM vs GCC binary performance
On 11 March 2011 14:53, Duncan Sands <baldrick at free.fr> wrote: > There's no magic bullet.  The things to improve that would give you the most > bang for your buck are probably the code generator and auto-vectorization. > Increasing the number of developers would be helpful. I'm not a GCC expert, but their auto-vectorization is not that great. It may be simple to do basic
2004 Sep 30
1
Vectorising and loop (was Re: optim "a log-likelihood function")
>From: Sundar Dorai-Raj <sundar.dorai-raj at PDF.COM> >Reply-To: sundar.dorai-raj at PDF.COM >To: Zhen Pang <nusbj at hotmail.com> >CC: r-help at stat.math.ethz.ch >Subject: Vectorising and loop (was Re: [R] optim "a log-likelihood >function") >Date: Wed, 29 Sep 2004 18:21:17 -0700 > > > >Zhen Pang wrote: > >> >>I also use
2016 Aug 25
2
Questions on LLVM vectorization diagnostics
Hi, Gerolf. We've been a bit quiet for some time. After listening to feedback on the project internally and externally, we decided to take a more generally accepted community development model ---- building up through a collection of small incremental changes ---- than trying to make a big step forward. That change of course took a bit of time, but we are getting close to the first NFC patch
2020 May 01
5
LV: predication
Hi Eli, > The problem with your proposal, as written, is that the vectorizer is producing the intrinsic. Because we don’t impose any ordering on optimizations before codegen, every optimization pass in LLVM would have to be taught to preserve any @llvm.set.loop.elements.i32 whenever it makes any change. This is completely impractical because the intrinsic isn’t related to anything
2017 Feb 03
2
RFC: Generic IR reductions
Yes, SVE can vectorize early exit loops by using speculative (first-faulting) loads, which essentially give a predicate of the lanes loaded successfully. For uncounted loops with these special loads, the loop predicate tests can be done using a 'ptest' instruction, checking if the last element is active. Amara On 3 February 2017 at 10:15, Simon Pilgrim <llvm-dev at redking.me.uk>