Displaying 5 results from an estimated 5 matches for "vector_faddsub".
2011 Oct 18
2
[LLVMdev] Matching addsub
...n.
2. Add an additional LLVM instruction.
3. Add a number of target-specific special cases into the higher-level
code.
I am not sure which is better, but I'd prefer to stay away from choice
(3) as much as practical in favor of one of the first two options. Would
you support adding some kind of vector_faddsub LLVM instruction?
Also, there is a precedent, in some sense, for choices (1) and (2) in
how fneg %a is serialized (as fsub -0.0, %a). Perhaps we could recognize
fadd (fmul <-1.0, 1.0>), %b and turn it into something else for
instruction selection in a similar way.
-Hal
> Dan
>
--...
2011 Oct 18
0
[LLVMdev] Matching addsub
...nstruction.
> 3. Add a number of target-specific special cases into the higher-level
> code.
>
> I am not sure which is better, but I'd prefer to stay away from choice
> (3) as much as practical in favor of one of the first two options. Would
> you support adding some kind of vector_faddsub LLVM instruction?
I assume you mean an operator that subtracts even elements and adds odd
elements; correct me if I'm wrong. I agree that this operation is fairly
common; I think a general intrinsic to do this would be useful for people
working on such targets.
>
> Also, there is a pr...
2011 Oct 18
1
[LLVMdev] Matching addsub
...number of target-specific special cases into the higher-level
> > code.
> >
> > I am not sure which is better, but I'd prefer to stay away from choice
> > (3) as much as practical in favor of one of the first two options. Would
> > you support adding some kind of vector_faddsub LLVM instruction?
>
> I assume you mean an operator that subtracts even elements and adds odd
> elements; correct me if I'm wrong. I agree that this operation is fairly
> common; I think a general intrinsic to do this would be useful for people
> working on such targets.
Yes,...
2011 Oct 18
0
[LLVMdev] Matching addsub
On Oct 17, 2011, at 3:40 PM, Hal Finkel wrote:
> How should I go about matching floating-point addsub-like vector
> instructions? My first inclination is to write something which matches
> build_vector 1.0, -1.0, and then use that in combination with a match on
> fadd, but that does not seem to work. I think this is because
> BUILD_VECTOR cannot ever be "Legal", and so it
2011 Oct 17
4
[LLVMdev] Matching addsub
How should I go about matching floating-point addsub-like vector
instructions? My first inclination is to write something which matches
build_vector 1.0, -1.0, and then use that in combination with a match on
fadd, but that does not seem to work. I think this is because
BUILD_VECTOR cannot ever be "Legal", and so it is always turned into a
constant load before instruction selection.