Displaying 20 results from an estimated 21 matches for "vecor".
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vector
2009 Dec 01
1
Error message when logical indexing vecor is all FALSE
Dears,
is there any way to "switch off" or work around the error message that
pops up when I do something like:
A<-B['logical vector']
and when 'logical vector' only consists of FALSE values? My problem is
that this message always kicks me out of my loops and always testing via
an if clause whether 'logical vector' contains any TRUE values is much
too
2008 Aug 12
4
Frequency vector
I want to create a vecor with frequencies.
I have tried this:
a <- c(1,1,1,1,2,3,4,5,5)
b <- table(a)
print (b[1])
which results in:
> print (b[1])
1
4
The only thing I want is the 4.
So this seems obvious:
print (b[1,2])
but it does not work:
Error in b[1, 2] : incorrect number of dimensions
How do I ge...
2003 May 08
2
EXCEL FILE
Hi gruop,
Pardon my question, but how could I import a excel file with 2 columns
to R and then work with them as vecors.
Thanks in advance,
2008 Dec 01
3
exclude a vector value from another vector
...5]
and has length 8 instead of 10.
In the cases when the size of pop and deriven sample of it is enough large
using the following command is not helpful.
newpop<-pop[-c(2,10)]
One could simplify my question in this way: how we can exclude a sub vector
values from a super vector value (i.e sub vecor values are subset of super
vector values).
Thanks in advance.
Hamid
[[alternative HTML version deleted]]
2008 Dec 01
2
vector
...5]
and has length 8 instead of 10.
In the cases when the size of pop and deriven sample of it is enough large
using the following command is not helpful.
newpop<-pop[-c(2,10)]
One could simplify my question in this way: how we can exclude a sub vector
values from a super vector value (i.e sub vecor values are subset of super
vector values).
Thanks in advance.
Hamid
[[alternative HTML version deleted]]
2012 Apr 24
1
how to cumulate up times
Dear List,
given a vecor of times in 5,15 and 30 minutes and a start point
in time, lets say 09:30:00, how do I add up those times
to the start time getting a cumulative time sequence?
mt<-times(c('00:05:00', '00:15:00', '00:30:00'))
mt wanted
00:05:00 09:35:00
00:15:00 09:50:00
00:30:00 1...
2013 Feb 19
2
[LLVMdev] Is it a bug or am I missing something ?
...float 0.000000e+00, float 0.000000e+00>, float %2, i32 2
%4 = insertelement <8 x float> %3, float %2, i32 1
%5 = getelementptr <8 x float>* %dest, i32 19
store <8 x float> %4, <8 x float>* %5, align 4
ret void
}
I'm expecting LLVM to generate code so that at vecor is stored at dest[19] with following value:
<float 0.000000e+00, float 'elem_0_of_source' , float 'elem_0_of_source', float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>
When I use llc trunk as follows on a Corei7 machine I'...
2012 Apr 18
2
[LLVMdev] Vectorization metadata
...is+transform AND analysis-only pre-passes, to allow a more fine
grained control over vectorization (and ease tests of other passes
that use Polly's info).
> If the parallelism information is available outside polly, we can also
> find some way to move code generation support for OpenMP, Vecorization
> and CUDA from Polly to LLVM transformation library, after that we can
> also generate such code base on the analysis result of the SCEV based
> parallelism analysis.
LLVM already has OpenMP support, maybe we should follow a similar
standard, or common them up.
CUDA would be clos...
2012 Apr 18
0
[LLVMdev] Vectorization metadata
...sis results into the polyhedral loop
parallelism analysis pass. By doing this, other
FunctionPasses/LoopPasses can query the parallelism information
calculated by Polly.
If the parallelism information is available outside polly, we can also
find some way to move code generation support for OpenMP, Vecorization
and CUDA from Polly to LLVM transformation library, after that we can
also generate such code base on the analysis result of the SCEV based
parallelism analysis.
best regards
ether
>
> 2. Full polyhedral code modification: use the annotation of the
> previous pass to extensively...
2013 Feb 19
0
[LLVMdev] Is it a bug or am I missing something ?
...float
0.000000e+00, float 0.000000e+00>, float %2, i32 2
%4 = insertelement <8 x float> %3, float %2, i32 1
%5 = getelementptr <8 x float>* %dest, i32 19
store <8 x float> %4, <8 x float>* %5, align 4
ret void
}
I'm expecting LLVM to generate code so that at vecor is stored at dest[19]
with following value:
<float 0.000000e+00, float 'elem_0_of_source' , float 'elem_0_of_source',
float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float
0.000000e+00, float 0.000000e+00>
When I use llc trunk as follows on a Corei7 machine I'...
2013 Feb 19
3
[LLVMdev] Pointer Context Metadata (was: Parallel Loop Metadata)
>
> Okay. If you'll update your local BBVectorize patches, then we can pull them upstream. Then we'll just need to update the unroller.
If I understand this thread correctly, you want to enable vecorization by telling the BB vectorizer that different operations are independent. I understand your motivation and I agree that this is indeed one way to do vectorization. However, I don't completely understand something. If we already have the information that consecutive iterations of the loop...
2013 Feb 18
2
[LLVMdev] Pointer Context Metadata (was: Parallel Loop Metadata)
On 02/18/2013 07:42 PM, Hal Finkel wrote:
> Why don't we just add an optional iteration id to
> !llvm.mem.parallel_loop_access?
Sounds like a good idea to me.
--
--Pekka
2013 Feb 18
0
[LLVMdev] Pointer Context Metadata (was: Parallel Loop Metadata)
----- Original Message -----
> From: "Pekka Jääskeläinen" <pekka.jaaskelainen at tut.fi>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "Andrew Trick" <atrick at apple.com>, "Tobias Grosser" <tobias at grosser.es>, "llvmdev at cs.uiuc.edu Dev"
> <llvmdev at cs.uiuc.edu>
> Sent: Monday, February 18, 2013
2012 Apr 19
0
[LLVMdev] Vectorization metadata
...s, to allow a more fine
> grained control over vectorization (and ease tests of other passes
> that use Polly's info).
>
>
> > If the parallelism information is available outside polly, we can
> > also find some way to move code generation support for OpenMP,
> > Vecorization and CUDA from Polly to LLVM transformation library,
> > after that we can also generate such code base on the analysis
> > result of the SCEV based parallelism analysis.
>
> LLVM already has OpenMP support, maybe we should follow a similar
> standard, or common them up....
2012 Apr 18
5
[LLVMdev] Vectorization metadata
Hal,
I'm opening a new discussion on vectorization metadata, since it has
little to do with fp-math. ;)
What kind of metadata would you annotate in the instructions? If I
remember from your talk, you're not doing any loop or whole-function
analysis, possibly leaving it for Polly to help you along the way.
I remember discussing it with Tobias that Polly could have three main steps:
1.
2005 May 04
5
Running CentOS on very old hardware
A friend has an old Pentium-133 laptop with 32MB of memory and a 1.3 GB
hard disk that he wants to use as a web server for a very small
community. Will CentOS (or any other RHEL derived distribution for
that matter) install and run with acceptable performance on such a
system, or will a specialized distribution like Damn Small Linux be a
better choice? In this case, disk space is not a big
2004 Feb 04
1
RE: error (fwd)
...ocess R segmentation fault at Wed Jan 28 21:14:41 2004
> > > >
> > ______________________________________________________________
> > _________
> > > > This was ran in mos2, interactively in emacs and the
> > error differs from
> > > > the other vecor errors.
> > > >
> > > > And then I ran the marchdatacopy1990.R in klee and got
> > the following
> > > > warning:
> > > >
> > ______________________________________________________________
> > _______________
> > > > run...
2017 Jan 14
13
RFC: Building GlobalISel by default
Hi all,
Now, four backends (if I am counting right: X86, ARM, AArch64, AMDGPU) are working on bringing-up GlobalISel, I’d like to switch the default of the LLVM_BUILD_GLOBAL_ISEL variable in CMake, such that the framework gets built by default.
** Impact of Flipping the Switch **
* Upsides *
For people developing on GlobalISel, it will:
- Simplify the CMake command to type :)
- Build/Test
2017 Jan 14
4
RFC: Building GlobalISel by default
...gt; - Require the setting of an additional CMake variable to disable it (-DLLVM_BUILD_GLOBAL_ISEL=OFF)
>
> This has a higher impact on slow bots, such as ARM and MIPS, and it's
> not a trivial amount of time and space.
>
> On previous occasions (for example integrated-asm, lld, vecorizer), we
> have used the "self-host + test-suite passing" model and it worked
> well. Meaning, before it passes those two, it should have special
> buildbots, after, it can be turned on by default.
>
> To move to the new technology we need an additional step, which is to
&...
2000 Nov 15
8
Optimisations
Looking through the archives I have seen talk of making CPU specific
optimisations for Vorbis, a la MMX/3DNow!/SSE. The feeling I gather is to
wait until something is working well in C before committing to any kind of
specific optimisation. What if oft used and needed DSP functions were
identified and standardised DSP functionality be written for Vorbis? This
would seperate the basically