Displaying 3 results from an estimated 3 matches for "vecinst".
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2009 Jun 08
2
[LLVMdev] Tablegen question
...vector
instruction. For example, myInst::AddV4 should become 4 myInst::Add,
etc. I need this opcode->opcode map, that can provide me this
information for all vector instructions. One way I can think of is,
put this information along with the vector instruction description in
the .td file.
class vecInst<...,myInst s> : myInst<...> {
myInst scalarVersion=s;
}
def AddV4 : vecInst<..., Add>;
def SubV2 : vecInst<..., Sub>;
...
def ORV4 : vecInst<..., OR>;
Now, I can write a tablegen backend that can output a opcode->opcode
map, which can be used by the pass. Is th...
2009 Jun 08
0
[LLVMdev] Tablegen question
Manjunath,
I asked this question recently, but instead of telling you to search the archive
I'm going to take it as a chance to recall how to do it (because I'll do so anyway
and even telling tablegen to use an enum for instructions is not as trivial to do
as you might think : )
I wrote it up in the wiki at
http://wiki.llvm.org/HowTo:_Add_arbitrary_properties_to_instructions
Regards,
2009 Jun 06
2
[LLVMdev] Tablegen question
I want to add a set of "properties" to each instruction in my
instruction set, and want to be able to query that in my
machine-specific optimizations. My Insts.td file looks as follows :
class InstProperty;
def propX : InstProperty;
def propY : InstProperty;
def propZ : InstProperty;
class myInst<..., list<InstProperty> props> : Instruction {
...
...