Displaying 3 results from an estimated 3 matches for "vecins1".
2019 Sep 27
2
Opportunity to split store of shuffled vector.
...mple below should be successfully compiled in any platform:
typedef float v4sf __attribute__ ((vector_size(16)));
void foo(v4sf *a) {
(*a)[0] = 1;
(*a)[3] = 2;
}
And we can get the IR mentioned before:
%0 = load <4 x float>, <4 x float>* %a, align 16
%vecins1 = shufflevector <4 x float> <float 1.000000e+00, float
undef, float undef, float 2.000000e+00>, <4 x float> %0, <4 x i32>
<i32 0, i32 5, i32 6, i32 3>
store <4 x float> %vecins1, <4 x float>* %a, align 16
Regards,
Qiu Chaofan
Florian Hahn <florian...
2019 Oct 04
2
Opportunity to split store of shuffled vector.
...%0, align 16
%vecins = insertelement <4 x float> %1, float 1.000000e+00, i32 0
store <4 x float> %vecins, <4 x float>* %0, align 16
%2 = load <4 x float>*, <4 x float>** %a.addr, align 8, !tbaa !3
%3 = load <4 x float>, <4 x float>* %2, align 16
%vecins1 = insertelement <4 x float> %3, float 2.000000e+00, i32 3
store <4 x float> %vecins1, <4 x float>* %2, align 16
ret void
}
Should this have been translated to GEP+scalar stores by clang rather than
vector load+store?
On Thu, Oct 3, 2019 at 12:33 PM Nemanja Ivanovic via llvm...
2019 Sep 26
2
Opportunity to split store of shuffled vector.
Hi there,
I notice that LLVM seems to always generate vector instructions for
vector operations in C, even it's just simple stores:
void foo(vector int* c) {
(*c)[0] = 1;
(*c)[1] = 2;
}
%0 = load <4 x i32>, <4 x i32>* %c, align 16
%vecins1 = shufflevector <4 x i32> <i32 1, i32 2, i32 undef, i32
undef>, <4 x i32> %0, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
store <4 x i32> %vecins1, <4 x i32>* %c, align 16
But GCC generates two direct stores to their address, just like
arrays, which should be b...