Displaying 3 results from an estimated 3 matches for "vec_result".
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2005 Dec 02
0
run time assembler patch for altivec, sse + bug fixes
...float *b, int len)
{
int i;
float sum;
int a_aligned = (((unsigned long)a) & 15) ? 0 : 1;
int b_aligned = (((unsigned long)b) & 15) ? 0 : 1;
__vector float MSQa, LSQa, MSQb, LSQb;
__vector unsigned char maska, maskb;
__vector float vec_a, vec_b;
__vector float vec_result;
vec_result = (__vector float)vec_splat_u8(0);
if ((!a_aligned) && (!b_aligned))
{
// This (unfortunately) is the common case.
maska = vec_lvsl(0, a);
maskb = vec_lvsl(0, b);
MSQa = vec_ld(0, a);
MSQb = vec_ld(0, b);
for (i = 0;...
2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
Jean-Marc,
>I'm still not sure I get it. On an Athlon XP, I can do something like
>"mulps xmm0, xmm1", which means that the xmm registers are indeed
>supported. Besides, without the xmm registers, you can't use much of
>SSE.
In the Atholon XP 2400+ that we have in our QA lab (Win2000 ) if you run
that code it generates an Illegal Instruction Error. In addition,
2004 Aug 06
6
[PATCH] Make SSE Run Time option.
...float sum;
int a_aligned = (((unsigned long)a) & 15) ? 0 : 1;
int b_aligned = (((unsigned long)b) & 15) ? 0 : 1;
__vector float MSQa, LSQa, MSQb, LSQb;
__vector unsigned char maska, maskb;
__vector float vec_a, vec_b;
__vector float vec_result;
vec_result = (__vector float)vec_splat_u8(0);
if ((!a_aligned) && (!b_aligned)) {
// This (unfortunately) is the common case.
maska = vec_lvsl(0, a);
maskb = vec_lvsl(0, b);
MSQa = vec_ld(0, a);
MSQb = ve...