search for: vec3s

Displaying 20 results from an estimated 48 matches for "vec3s".

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2009 Aug 26
0
[LLVMdev] [Stackless] [C++-sig] [Boost] Trouble optimizing Boost.Python integration for game development (it seems too slow)
On Wed, Aug 26, 2009 at 4:41 AM, Dan Sanduleac<sanduleac.dan at gmail.com> wrote: > Oh, I see. Didn't think of this, thanks! > > So, just to be clear, there's no binding overhead in Cython because the > functions defined there are pure python, right? (The function objects I > mean). Whereas the ones I defined in Boost are more expensive to call. > > On Wed, Aug
2011 Aug 12
1
[LLVMdev] Using sret AND thiscall calling convention
Hi all, I am trying to generate LLVM IR that calls an external C++ function returning a structure by copy: vec3 vec3::Cross(const vec3& iV) const; Here is the LLVM IR that I am generating for win32 ABI, which says that the first parameter should be a pointer to the return value: %vec3 = type <{ float, float, float }> define void @CPP_Return_Struct(%vec3* %v1, %vec3* %v2) inlinehint
2011 Aug 12
1
[LLVMdev] Using sret AND thiscall calling convention
On Fri, Aug 12, 2011 at 1:11 AM, Damien Gleizes <gleizesd at gmail.com> wrote: > > Hi all, > > I am trying to generate LLVM IR that calls an external C++ function > returning a structure by copy: > vec3 vec3::Cross(const vec3& iV) const; > > Here is the LLVM IR that I am generating for win32 ABI, which says that the > first parameter should be a pointer to the
2010 Aug 24
3
multiple assignments ?
Simple one, have read and googled, still no luck! I want to create several empty vectors all of the same length. I would like multiple empty vectors (vec1, vec2, vec3) and want to create them all in one line. I've tried vec1,vec2,vec3 <- vector(length=5) and c(vec1,vec2,vec3) <- vector(length=5) and several other attempts but nothing seems to work ... suggestions? Thanks Jim
2015 May 04
2
[LLVMdev] Incorrect code generated for arm64
Hi all, I’ve narrowed down a problem in my code to the following test case: - - - - typedef struct {float v[2];} vec2; typedef struct {float v[3];} vec3; vec2 getVec2(); vec3 getVec3() { vec2 myVec = getVec2(); vec3 res; res.v[0] = myVec.v[0]; res.v[1] = myVec.v[1]; res.v[2] = 1; return res; } - - - - Compiling this with any level of optimization for arm64 gives incorrect code,
2013 Jun 18
1
transform 3 numeric vectors empty of 0/1
Dear all, Without a loop, I would like transform 3 numeric vectors empty of 0/1 of same length Vec1 : transform 1 to A and 0 to "" Vec2 : transform 1 to B and 0 to "" Vec3 : transform 1 to C and 0 to "" to obtain only 1 vector Vec who is the paste of the 3 vectors (Ex : ABC, BC, AC, AB,...) Any idea ? Thank you for your help -- Michel ARNAUD
2012 Feb 29
2
[LLVMdev] Expand vector type
...STORE() -> GenWidenVectorStores() -> FindMemType(). I've made a very small modification to enable support for widening stores to a larger type. Before spending more time on working on a generic solution I have a couple of questions: * Is there a way to setup LLVM to automatically convert vec3s to vec4s? * Is there interest in adding support for widened vector stores to a larger type? Thanks, Javier -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120229/3adfdb14/attachment.html>
2012 Apr 05
0
[LLVMdev] Difference between 2.9 and 3.0 in intel ASM printer
Hi, I'm almost there with my Yasm printer, however, I've stumbled upon this. Using this: ; ModuleID = 'data.u' %window = type { %visobj, %vec2, %vec2, %vec2, %string, %color, i32, i32, %string, %string, %string, i1, i1, i1, i1, i1, i1, i32, i8* } %visobj = type { %object, i1, i1, i1, i1, %color, %vec4, %vec4, %vec4, %vec4, i32, %mat4, %mat4, %mat4, %mat4, %material*,
2012 Feb 29
2
[LLVMdev] Expand vector type
...g on ARM NEON support. Can you please confirm? Thanks, Javier From: James Molloy [mailto:james.molloy at arm.com] Sent: Wednesday, February 29, 2012 2:35 AM To: Martinez, Javier E; llvmdev at cs.uiuc.edu Subject: RE: Expand vector type Hi, * Is there a way to setup LLVM to automatically convert vec3s to vec4s? Yes, if you specify v3i16 and friends as "promote" instead of "legal", llvm will promote it to a v4i16. The ARM NEON backend does this already. I'm surprised you haven't got this happening already as you mention that LLVM widens your loads to 4-element vectors...
2012 Feb 29
0
[LLVMdev] Expand vector type
Hi, * Is there a way to setup LLVM to automatically convert vec3s to vec4s? Yes, if you specify v3i16 and friends as "promote" instead of "legal", llvm will promote it to a v4i16. The ARM NEON backend does this already. I'm surprised you haven't got this happening already as you mention that LLVM widens your loads to 4-element vect...
2011 Oct 01
2
Returning vector of values shared across 3 vectors?
Help-Rs,   I've got three vectors representing participants:   vec1 <- c(4,5,6,7,8,9,10,11,12,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81) vec2 <- c (1,2,3,4,5,6,7,8,9,10,11,12,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66) vec3 <- c (1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,52)   I'd
2004 Jul 09
3
Problem with bwplot
Try factor(vec2) in your bwplot() call. -----Original Message----- From: r-help-bounces at stat.math.ethz.ch [mailto:r-help-bounces at stat.math.ethz.ch]On Behalf Of Ernesto Jardim Sent: Friday, July 09, 2004 9:41 AM To: Mailing List R Subject: [R] Problem with bwplot Hi, I'm ploting some box-and-whisker plots with bwplot but I'm not getting any box-and-whiskers ... just dots.
2012 Nov 08
5
map two names into one
Thanks. Yes. Your approach can identify: Glaxy ace S 5830 and S 5830 Glaxy ace But you can not identify using same program: Iphone 4S 16 G Iphone 4S 16G How should I solve both in same time. Kind regards,Tammy [[alternative HTML version deleted]]
2015 May 04
2
[LLVMdev] Incorrect code generated for arm64
Thanks Bruce. > On 4 May 2015, at 13:18, Bruce Hoult <bruce at hoult.org> wrote: > > I can confirm that, with Apple LLVM version 6.0 (clang-600.0.56) (based on LLVM 3.5svn) > > Very strange! Yes, that’s what I thought. I’ve also checked the binary downloads for OS X from llvm.org <http://llvm.org/> and get the same broken code from both the 3.5.2 and 3.6.0 releases.
2007 Feb 01
2
Losing factor levels when moving variables from one context to another
Hi, there I'm currently trying to figure out how to keep my "factor" levels for a variable when moving it from one data frame or matrix to another. Example below: vec1<-(rep("10",5)) vec2<-(rep("30",5)) vec3<-(rep("80",5)) vecs<-c(vec1, vec2, vec3) resp<-rnorm(2,15) dat<-as.data.frame(cbind(resp, vecs))
2012 Mar 05
0
[LLVMdev] Expand vector type
...mailto:james.molloy at arm.com]<mailto:[mailto:james.molloy at arm.com]> Sent: Wednesday, February 29, 2012 2:35 AM To: Martinez, Javier E; llvmdev at cs.uiuc.edu<mailto:llvmdev at cs.uiuc.edu> Subject: RE: Expand vector type Hi, * Is there a way to setup LLVM to automatically convert vec3s to vec4s? Yes, if you specify v3i16 and friends as "promote" instead of "legal", llvm will promote it to a v4i16. The ARM NEON backend does this already. I'm surprised you haven't got this happening already as you mention that LLVM widens your loads to 4-element vectors...
2012 Mar 05
1
[LLVMdev] Expand vector type
...:[mailto:james.molloy at arm.com]> > *Sent:* Wednesday, February 29, 2012 2:35 AM > *To:* Martinez, Javier E; llvmdev at cs.uiuc.edu <mailto:llvmdev at cs.uiuc.edu> > *Subject:* RE: Expand vector type > > Hi, > > * *Is there a way to setup LLVM to automatically convert vec3s to vec4s? * > > ** > > Yes, if you specify v3i16 and friends as “promote” instead of “legal”, llvm will > promote it to a v4i16. The ARM NEON backend does this already. I’m surprised you > haven’t got this happening already as you mention that LLVM widens your loads to > 4-elem...
2019 Feb 01
2
[RFC] Vector Predication
--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68 On Thu, Jan 31, 2019 at 10:22 PM Jacob Lifshay <programmerjake at gmail.com> wrote: > > We're in-progress designing a RISC-V extension (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-January/000433.html) that would have variable-length vectors of short vectors (1 to 4): > <VL x <4 x
2012 May 04
1
Equality of multiple vectors
Hello, I'm writing a piece of code where I need to compare multiple same length vectors. I've gone through the basic functions like identical() or all(), but they only work for comparing 2 vectors. From 3 vectors on, it doesn't work . Example: Assuming vec1 <- c (1,2,3,4,5) vec2 <- c(1,2,3,4,5) vec3 <- c(1,2,3,4,4) identical (vec1,vec2,vec3) returns TRUE, since the 2
2006 Apr 15
1
Removing Rows/Records from a Table
I would like to selectively remove rows from a table. I had hoped that I could create a table and selectively add rows with something like > NewTable<-table(nrow=100, ncol=4) > NewTable[1,]<-OldTable[10,] but that doesn't work. The former call gives > NewTable ncol nrow 4 100 1 while the latter call gives a table the length of OldTable. Making a matrix, m, with the