search for: vc_handle_trap_db

...gt; > lockdep_assert_irqs_disabled(); > + > + /* > + * #DB is special and needs to be handled outside of the intrumentation_begin()/end(). > + * Otherwise the #VC handler could be raised recursivly. > + */ > + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) { > + vc_handle_trap_db(regs); > + return; > + } > + > instrumentation_begin(); Wait what?! That makes no sense what so ever.

...gt; > lockdep_assert_irqs_disabled(); > + > + /* > + * #DB is special and needs to be handled outside of the intrumentation_begin()/end(). > + * Otherwise the #VC handler could be raised recursivly. > + */ > + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) { > + vc_handle_trap_db(regs); > + return; > + } > + > instrumentation_begin(); Wait what?! That makes no sense what so ever.

...--git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c index 8f275e5d1ce7..b0f08d9669f1 100644 --- a/arch/x86/kernel/sev-es.c +++ b/arch/x86/kernel/sev-es.c @@ -928,6 +928,14 @@ static enum es_result vc_handle_trap_ac(struct ghcb *ghcb, return ES_EXCEPTION; } +static __always_inline void vc_handle_trap_db(struct pt_regs *regs) +{ + if (user_mode(regs)) + noist_exc_debug(regs); + else + exc_debug(regs); +} + static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt, struct ghcb *ghcb, unsigned long exit_code) @@ -1028,6 +1036,16 @@ DEFINE_IDTENTRY_VC_SAFE_STACK(exc_vmm_communi...

...--git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c index ee0950f01590..e1f3ebbcc122 100644 --- a/arch/x86/kernel/sev-es.c +++ b/arch/x86/kernel/sev-es.c @@ -922,6 +922,14 @@ static enum es_result vc_handle_trap_ac(struct ghcb *ghcb, return ES_EXCEPTION; } +static __always_inline void vc_handle_trap_db(struct pt_regs *regs) +{ + if (user_mode(regs)) + noist_exc_debug(regs); + else + exc_debug(regs); +} + static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt, struct ghcb *ghcb, unsigned long exit_code) @@ -1033,6 +1041,15 @@ DEFINE_IDTENTRY_VC_SAFE_STACK(exc_vmm_communi...

...sabled(); > > + > > + /* > > + * #DB is special and needs to be handled outside of the intrumentation_begin()/end(). > > + * Otherwise the #VC handler could be raised recursivly. > > + */ > > + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) { > > + vc_handle_trap_db(regs); > > + return; > > + } > > + > > instrumentation_begin(); > > Wait what?! That makes no sense what so ever. Then my understanding of intrumentation_begin/end() is wrong, I thought that the kernel will forbid setting breakpoints before instrumentation_begin()...

...; > + /* > > > + * #DB is special and needs to be handled outside of the intrumentation_begin()/end(). > > > + * Otherwise the #VC handler could be raised recursivly. > > > + */ > > > + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) { > > > + vc_handle_trap_db(regs); > > > + return; > > > + } > > > + > > > instrumentation_begin(); > > > > Wait what?! That makes no sense what so ever. > > Then my understanding of intrumentation_begin/end() is wrong, I thought > that the kernel will forbid setti...

...; > + /* > > > + * #DB is special and needs to be handled outside of the intrumentation_begin()/end(). > > > + * Otherwise the #VC handler could be raised recursivly. > > > + */ > > > + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) { > > > + vc_handle_trap_db(regs); > > > + return; > > > + } > > > + > > > instrumentation_begin(); > > > > Wait what?! That makes no sense what so ever. > > Then my understanding of intrumentation_begin/end() is wrong, I thought > that the kernel will forbid setti...

...dx = ctxt->regs->dx; + + /* Ignore insertion errors */ + ret = xa_insert(&sev_es_cpuid_cache, cache_index, + cache_entry, GFP_ATOMIC); + } +} + static enum es_result vc_handle_dr7_write(struct ghcb *ghcb, struct es_em_ctxt *ctxt) { @@ -895,6 +994,24 @@ static enum es_result vc_handle_trap_db(struct ghcb *ghcb, return ES_EXCEPTION; } +static enum es_result vc_handle_cpuid_cached(struct ghcb *ghcb, + struct es_em_ctxt *ctxt) +{ + unsigned long cache_index; + enum es_result result; + + cache_index = sev_es_get_cpuid_cache_index(ctxt); + + if (sev_es_check_cpuid_cache(ctxt, c...

From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into

From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into

Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by

Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by

From: Joerg Roedel <jroedel at suse.de> Hi, here is a rebased version of the latest SEV-ES patches. They are now based on latest tip/master instead of upstream Linux and include the necessary changes. Changes to v4 are in particular: - Moved early IDT setup code to idt.c, because the idt_descr and the idt_table are now static - This required to make stack protector work early (or

From: Joerg Roedel <jroedel at suse.de> Hi, here is the new version of the SEV-ES client enabling patch-set. It is based on the latest tip/master branch and contains the necessary changes. In particular those ar: - Enabling CR4.FSGSBASE early on supported processors so that early #VC exceptions on APs can be handled. - Add another patch (patch 1) to fix a KVM frame-size build

From: Joerg Roedel <jroedel at suse.de> Hi, here is a new version of the SEV-ES Guest Support patches for x86. The previous versions can be found as a linked list starting here: https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/ I updated the patch-set based on ther review comments I got and the discussions around it. Another important change is that the early IDT

From: Joerg Roedel <jroedel at suse.de> Hi, here is a new version of the SEV-ES Guest Support patches for x86. The previous versions can be found as a linked list starting here: https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/ I updated the patch-set based on ther review comments I got and the discussions around it. Another important change is that the early IDT