search for: vc_boot_ghcb

Displaying 13 results from an estimated 13 matches for "vc_boot_ghcb".

2020 May 20
2
[PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler
...86/include/asm/sev-es.h > index b2cbcd40b52e..e1ed963a57ec 100644 > --- a/arch/x86/include/asm/sev-es.h > +++ b/arch/x86/include/asm/sev-es.h > @@ -74,5 +74,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits) > } > > extern void vc_no_ghcb(void); > +extern bool vc_boot_ghcb(struct pt_regs *regs); Those function names need verbs: handle_vc_no_ghcb handle_vc_boot_ghcb > @@ -161,3 +176,104 @@ static enum es_result vc_read_mem(struct es_em_ctxt *ctxt, > > /* Include code shared with pre-decompression boot stage */ > #include "sev-es-shared.c&quot...
2020 May 20
2
[PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler
...86/include/asm/sev-es.h > index b2cbcd40b52e..e1ed963a57ec 100644 > --- a/arch/x86/include/asm/sev-es.h > +++ b/arch/x86/include/asm/sev-es.h > @@ -74,5 +74,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits) > } > > extern void vc_no_ghcb(void); > +extern bool vc_boot_ghcb(struct pt_regs *regs); Those function names need verbs: handle_vc_no_ghcb handle_vc_boot_ghcb > @@ -161,3 +176,104 @@ static enum es_result vc_read_mem(struct es_em_ctxt *ctxt, > > /* Include code shared with pre-decompression boot stage */ > #include "sev-es-shared.c&quot...
2020 Sep 07
0
[PATCH v7 40/72] x86/sev-es: Setup GHCB based boot #VC handler
...include/asm/sev-es.h index 7175d432ebfe..9fbeedaa66ee 100644 --- a/arch/x86/include/asm/sev-es.h +++ b/arch/x86/include/asm/sev-es.h @@ -75,5 +75,7 @@ static inline u64 lower_bits(u64 val, unsigned int bits) /* Early IDT entry points for #VC handler */ extern void vc_no_ghcb(void); +extern void vc_boot_ghcb(void); +extern bool handle_vc_boot_ghcb(struct pt_regs *regs); #endif diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 3bcdd8d2bbdd..04ceea8f4a89 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -20,6 +20,7 @@ CFLAGS_REMOVE_kvmclock.o = -pg CFLAGS_RE...
2020 Jun 04
1
[PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler
...onvention for > them, like e.g. 'page_fault', 'nmi' or 'general_protection'. Should I > still add the verbs or just add a comment explaining what those symbols > are? Hmmkay, I see vc_no_ghcb doing call do_vc_no_ghcb and that's setup in early_idt_setup(). vc_boot_ghcb(), OTOH, is called by do_early_exception() only so that one could be called handle_vc_boot_ghcb(), no? I.e., I don't see it being an IDT entry point. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette
2020 Apr 28
0
[PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler
...a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h index b2cbcd40b52e..e1ed963a57ec 100644 --- a/arch/x86/include/asm/sev-es.h +++ b/arch/x86/include/asm/sev-es.h @@ -74,5 +74,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits) } extern void vc_no_ghcb(void); +extern bool vc_boot_ghcb(struct pt_regs *regs); #endif diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 9586522bfcb3..d83d59c15548 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -386,6 +386,12 @@ void __init do_early_exception(struct pt_regs *regs, int trapnr) early_m...
2020 Jun 04
0
[PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler
...b2cbcd40b52e..e1ed963a57ec 100644 > > --- a/arch/x86/include/asm/sev-es.h > > +++ b/arch/x86/include/asm/sev-es.h > > @@ -74,5 +74,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits) > > } > > > > extern void vc_no_ghcb(void); > > +extern bool vc_boot_ghcb(struct pt_regs *regs); > > Those function names need verbs: > > handle_vc_no_ghcb > handle_vc_boot_ghcb This are IDT entry points and the names above follow the convention for them, like e.g. 'page_fault', 'nmi' or 'general_protection'. Should I still add...
2020 Apr 28
0
[PATCH v3 69/75] x86/realmode: Setup AP jump table
...it a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h index ca0e12cb089c..c89b6e2e6439 100644 --- a/arch/x86/include/asm/sev-es.h +++ b/arch/x86/include/asm/sev-es.h @@ -78,17 +78,23 @@ static inline u64 lower_bits(u64 val, unsigned int bits) extern void vc_no_ghcb(void); extern bool vc_boot_ghcb(struct pt_regs *regs); +struct real_mode_header; enum stack_type; #ifdef CONFIG_AMD_MEM_ENCRYPT const char *vc_stack_name(enum stack_type type); void sev_es_nmi_enter(void); void sev_es_nmi_exit(void); +int sev_es_setup_ap_jump_table(struct real_mode_header *rmh); #else /* CONFIG_AMD_MEM_...
2020 Apr 28
0
[PATCH v3 45/75] x86/dumpstack/64: Handle #VC exception stacks
...-9,6 +9,8 @@ #define __ASM_ENCRYPTED_STATE_H #include <linux/types.h> + +#include <asm/stacktrace.h> #include <asm/insn.h> #define GHCB_SEV_INFO 0x001UL @@ -76,4 +78,15 @@ static inline u64 lower_bits(u64 val, unsigned int bits) extern void vc_no_ghcb(void); extern bool vc_boot_ghcb(struct pt_regs *regs); +enum stack_type; + +#ifdef CONFIG_AMD_MEM_ENCRYPT +const char *vc_stack_name(enum stack_type type); +#else /* CONFIG_AMD_MEM_ENCRYPT */ +static inline const char *vc_stack_name(enum stack_type type) +{ + return NULL; +} +#endif /* CONFIG_AMD_MEM_ENCRYPT*/ + #endif diff --...
2020 Apr 28
0
[PATCH v3 47/75] x86/sev-es: Add Runtime #VC Exception Handler
...t;PANIC: Unknown result in %s():%d\n", __func__, result); + /* + * Emulating the instruction which caused the #VC exception + * failed - can't continue so print debug information + */ + BUG(); + } + + return; + +fail: + show_regs(regs); + + while (true) + halt(); +} + bool __init vc_boot_ghcb(struct pt_regs *regs) { unsigned long exit_code = regs->orig_ax; -- 2.17.1
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is a new version of the SEV-ES Guest Support patches for x86. The previous versions can be found as a linked list starting here: https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/ I updated the patch-set based on ther review comments I got and the discussions around it. Another important change is that the early IDT
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is a new version of the SEV-ES Guest Support patches for x86. The previous versions can be found as a linked list starting here: https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/ I updated the patch-set based on ther review comments I got and the discussions around it. Another important change is that the early IDT
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by