Displaying 5 results from an estimated 5 matches for "vasilache".
2020 Feb 08
2
Writing loop transformations on the right representation is more productive
...ss-based optimizers.
>
> Cool. I’d really recommend you connect with some of the loop optimization
> people working on MLIR to learn more about what they are doing, because it
> is directly related to this and I’d love for there to be more communication.
>
> I’ve cc'd Nicolas Vasilache, Uday Bondhugula, and Albert Cohen as examples
> that would be great to connect with.
>
You may have already seen my discussion with Uday on the mailing list. I
would like to discuss approaches with all 3 of them, at latest at EuroLLVM
(or contact be before that, e.g. on this mailing-list th...
2020 Feb 10
2
Writing loop transformations on the right representation is more productive
...;> Cool. I’d really recommend you connect with some of the loop
>> optimization people working on MLIR to learn more about what they are
>> doing, because it is directly related to this and I’d love for there to be
>> more communication.
>>
>> I’ve cc'd Nicolas Vasilache, Uday Bondhugula, and Albert Cohen as
>> examples that would be great to connect with.
>>
>
> You may have already seen my discussion with Uday on the mailing list. I
> would like to discuss approaches with all 3 of them, at latest at EuroLLVM
> (or contact be before that, e...
2020 Feb 06
2
Writing loop transformations on the right representation is more productive
Am Mi., 5. Feb. 2020 um 18:13 Uhr schrieb Chris Lattner <clattner at nondot.org>:
> If I understand your claims, you are claiming both that red/green trees are essential for a loop optimizer, and that this essential nature “justifies” the cost of reinventing an entire compiler infrastructure is lower than the benefit of using (e.g.) MLIR to do this. I haven’t seen evidence of either
2019 Aug 16
2
[ORC] [mlir] Dump assembly from OrcJit
+ MLIR dev mailing list since that’s where the OrcJit I’m using is.
Thanks for all the details, Lang! What you described is exactly what I’m looking for!
Please, MLIR dev, let me know if this debug feature and the solution that Lang describes below is interesting for MLIR. I’ll dig more into the details then but it doesn’t seem too complicated.
Thanks,
Diego
From: Lang Hames [mailto:lhames at
2020 Aug 14
6
Intel AMX programming model discussion.
Hi,
Intel Advanced Matrix Extensions (Intel AMX) is a new programming paradigm consisting of two components: a set of 2-dimensional registers (tiles) representing sub-arrays from a larger 2-dimensional memory image, and accelerators able to operate on tiles. Capability of Intel AMX implementation is enumerated by palettes. Two palettes are supported: palette 0 represents the initialized state and