search for: variadicoperandlist

Displaying 2 results from an estimated 2 matches for "variadicoperandlist".

2012 Oct 05
0
[LLVMdev] Distinguish variadic register defines/uses in MCInstrDesc?
Hallo, I worked on how to handle the distinction between variadic defines and uses and my current solution is this: I introduce a new dag item in Instruction called VariadicOperandList, which by default is undefined. It keeps a marker variable_* and all operands which are placeholders for variable lists (like 'reglist' on ARM). I think it's the cleanest solution to keep them in a seperate dag, because else either register defines would be in the 'ins' list...
2012 Sep 26
2
[LLVMdev] Distinguish variadic register defines/uses in MCInstrDesc?
Am Mittwoch, 26. September 2012, 11:18:20 schrieb Jakob Stoklund Olesen: > Hi Christoph, > > As you noticed, MCInstrDesc doesn't distinguish between variadic uses and > defs. Since variadic instructions will always require some kind of special > handling, it doesn't seem worthwhile to make the model more detailed. I don't see what makes them so different from other