search for: var_50

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[LLVMdev] trunk's optimizer generates slower code than 3.5
2015 Feb 13
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...pop r13 pop r14 pop r15 pop rbp retn _main endp ``` clang 3.6's result: ``` public _main _main proc near var_60 = qword ptr -60h var_58 = qword ptr -58h var_50 = qword ptr -50h var_48 = qword ptr -48h var_40 = qword ptr -40h var_38 = qword ptr -38h push rbp push r15 push r14 push r13 push r12 push rbx...
[LLVMdev] trunk's optimizer generates slower code than 3.5
2015 Feb 14
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...retn >> _main endp >> ``` >> >> clang 3.6's result: >> >> ``` >> public _main >> _main proc near >> >> var_60 = qword ptr -60h >> var_58 = qword ptr -58h >> var_50 = qword ptr -50h >> var_48 = qword ptr -48h >> var_40 = qword ptr -40h >> var_38 = qword ptr -38h >> >> push rbp >> push r15 >> push r14 >> pu...
[LLVMdev] trunk's optimizer generates slower code than 3.5
2015 Feb 14
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...t;>>> clang 3.6's result: >>>> >>>> ``` >>>> public _main >>>> _main proc near >>>> >>>> var_60 = qword ptr -60h >>>> var_58 = qword ptr -58h >>>> var_50 = qword ptr -50h >>>> var_48 = qword ptr -48h >>>> var_40 = qword ptr -40h >>>> var_38 = qword ptr -38h >>>> >>>> push rbp >>>> push r15 >>>>...
Possibility of implementing a low-level naive lock purely with LLVM atomics?
2018 Jul 24
2
Possibility of implementing a low-level naive lock purely with LLVM atomics?
...``` @Flag = private global i32 0, align 4 %0 = load atomic i32, i32* @Flag acquire, align 4 %1 = icmp eq i32 %0, 1 ....... store atomic i32 1, i32* @Flag release, align 4 ``` However when inspecting the generated assembly on x86-64, the following assembly was generated: ``` mov qword [rbp+var_50], rcx mov qword [rbp+var_48], rdx mov rbx, rsi mov r15, rdi mov eax, dword [l_Flag] ; l_Flag cmp eax, 0x1 ``` Which to my best knowledge is not atomic. I'd like to know how do I fix my frontend to make sure the locking mechanism works...