Displaying 3 results from an estimated 3 matches for "valid_caching".
2013 Aug 28
1
[PATCH 4/6] drm/nouveau: introduce NOUVEAU_GEM_TILE_WCUS
...nouveau_bo_new(struct drm_device *dev, int size, int align,
>
> nouveau_bo_fixup_align(nvbo, flags, &align, &size);
> nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
> +
> + if (tile_flags & NOUVEAU_GEM_TILE_WCUS)
> + nvbo->valid_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
> + else
> + nvbo->valid_caching = TTM_PL_MASK_CACHING;
> +
> nouveau_bo_placement_set(nvbo, flags, 0);
>
> acc_size = ttm_bo_dma_acc_size(&drm->ttm.bdev, size,
> @@ -292,7 +298,7 @@ void
>...
2013 Aug 28
0
[PATCH 4/6] drm/nouveau: introduce NOUVEAU_GEM_TILE_WCUS
...b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -231,6 +231,12 @@ nouveau_bo_new(struct drm_device *dev, int size, int align,
nouveau_bo_fixup_align(nvbo, flags, &align, &size);
nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
+
+ if (tile_flags & NOUVEAU_GEM_TILE_WCUS)
+ nvbo->valid_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
+ else
+ nvbo->valid_caching = TTM_PL_MASK_CACHING;
+
nouveau_bo_placement_set(nvbo, flags, 0);
acc_size = ttm_bo_dma_acc_size(&drm->ttm.bdev, size,
@@ -292,7 +298,7 @@ void
nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, u...
2013 Aug 28
11
[PATCH 0/6] Nouveau on ARM fixes
This is the first set of patches to make Nouveau work
on Tegra. Those are only the obvious correctness fixes,
a lot of optimization work remains to be done, but at least
it's enough to get accel working and let the machine survive
a piglit run.
A new BO flag is introduced to allow userspace to hint the
kernel about possible optimizations.
Lucas Stach (6):
drm/ttm: recognize ARM arch in