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...to be a bit of overkill. Therefore I was thinking about the special pass after code selection, but before register allocation. After all, I just want to do a transformation on all instructions that read or write from/into virtual f64 regs. load/store vregf64, val -> load/store vregi32_1, val_low load/store vregi32_2, val_high My subjective feeling is that is can be done easier in a separate pass rather then chaning the legalizer all over the place in a rather non-elegant way. > > Another thing I have in mind is: > > It looks like the easiest way at all would be to hav...

...I was thinking about the > special pass after code selection, but before register allocation. Ok. > After all, I just want to do a transformation on all instructions that > read or write from/into virtual f64 regs. > > load/store vregf64, val > -> > load/store vregi32_1, val_low > load/store vregi32_2, val_high > > My subjective feeling is that is can be done easier in a separate pass > rather then chaning the legalizer all over the place in a rather > non-elegant way. You could do this, but it's not the "right" way to go, for the same reaso...

On Fri, 17 Nov 2006, Roman Levenstein wrote: > I still have some questions about FP emulation for my embedded target. > To recap a bit: > My target only has integer registers and no hardware support for FP. FP > is supported only via emulation. Only f64 is supported. All FP > operations should be implemented to use i32 registers. ok > allocation. But anyway, I have an almost

Hi, I still have some questions about FP emulation for my embedded target. To recap a bit: My target only has integer registers and no hardware support for FP. FP is supported only via emulation. Only f64 is supported. All FP operations should be implemented to use i32 registers. Based on the fruitful discussions on this list I was already able to implement mapping of the FP operations to