Displaying 3 results from an estimated 3 matches for "vaddf32".
2012 Sep 21
0
[LLVMdev] Question about LLVM NEON intrinsics
On 21 September 2012 09:28, Sebastien DELDON-GNB
<sebastien.deldon at st.com> wrote:
> declare <16 x float> @llvm.arm.neon.vmaxs.v16f32(<16 x float>, <16 x float>) nounwind readnone
>
> llc fails with following message:
>
> SplitVectorResult #0: 0x2258350: v16f32 = llvm.arm.neon.vmaxs 0x2258250, 0x2258050, 0x2258150 [ORD=3] [ID=0]
>
> LLVM ERROR: Do not
2012 Sep 21
2
[LLVMdev] RE : Question about LLVM NEON intrinsics
...floats in ARM ISA but it is legal to write in LLVM:
; ModuleID = 'vadd.ll'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "armv7-none-linux-androideabi"
define void @vaddf32(<16 x float> *%C, <16 x float>* %A, <16 x float>* %B) nounwind {
%tmp1 = load <16 x float>* %A
%tmp2 = load <16 x float>* %B
%tmp3 = fadd <16 x float> %tmp1, %tmp2
store <16 x float> %tmp3, <16 x float>* %C
ret void
}
and llc gene...
2012 Sep 21
5
[LLVMdev] Question about LLVM NEON intrinsics
Hi all,
I would like to know if LLVM Neon intrinsics are designed to support only 'Legal' types for NEON units.
Using llc -march=arm -mcpu=cortex-a9 vmax4.ll -o vmax4.s on following ll code:
; ModuleID = 'vmax.ll'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple =