search for: v_mad_f32

...ng the code with lld (The LLVM linker). The assembly code contains the following assembly codes (and lots of other similar format assembly) that fails to be parsed by AMDGPUAsmParser. It seems to me that both are valid instructions after looking at the SI instruction spec. s_mov_b32 s0, 0xfe5163ab v_mad_f32 v9, 0.5, v5, -v8 To reproduce this, I write this two lines in a text file and run llvm-mc -arch=amdgcn -mcpu=kaveri input.s The first line has the following error message: sop1-playground.s:1:15: error: invalid immediate: only 32-bit values are legal s_mov_b32 s0, 0xfe5163ab...

...ompilers/LLVM/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:184: > void (anonymous namespace)::AMDGPUOperand::setModifiers(unsigned int): > Assertion `isReg()' failed. > > > > and reports that 0.5 is "error: invalid operand for instruction" > > > > v_mad_f32 v9, 0.5, v5, -v8 > > There is a bug with operand parsing when you have immediate operands and > source modifiers. I haven’t fixed this yet, but you can work around it for > now by not using the source modifier. > I have no idea what to do the work-around. To me the modifier is set wh...

I am writing a backend for an experimental machine that has both 2-address and 3-address versions of some instructions. The 2-address versions are more compact and thus preferred when applicable. How does one go about generating the most compact version? 1. At instruction selection, is there a predicate that can test whether one of the input sources is dead, thus allowing the selection of the