Displaying 9 results from an estimated 9 matches for "v6t2".
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v622
2011 Mar 18
0
[LLVMdev] [RC1] Status of Visual Studio 8, 9 and 10
...---------
Running Clang and LLVM regression tests
-- Testing: 8724 tests, 8 threads --
FAIL: LLVM :: CodeGen/ARM/bfi.ll (3435 of 8724)
******************** TEST 'LLVM :: CodeGen/ARM/bfi.ll' FAILED ********************
Script:
--
E:/llvm/build/cmake-vs9/bin/Release/llc.EXE -march=arm -mattr=+v6t2 < E:/llvm/llvm/test/CodeGen/ARM/bfi.ll | E:/llvm/build/cmake-vs9/bin/Release/FileCheck.EXE E:/llvm/llvm/test/CodeGen/ARM/bfi.ll
--
Exit Code: 1
Command Output (stdout):
--
Command 0: "E:/llvm/build/cmake-vs9/bin/Release/llc.EXE" "-march=arm" "-mattr=+v6t2"
Command 0...
2016 Aug 02
2
[Release-testers] [3.9 Release] Release Candidate 1 has been tagged
On 1 August 2016 at 17:37, Hans Wennborg <hans at chromium.org> wrote:
>> Is it time to do the back-ports planned? I only have a very minor bug fix.
>
> Sure!
Backported the v6T2/DSP patch. Now just needs to get Diana's AArch64
fix and we're fine.
cheers,
--renato
2012 May 31
0
[LLVMdev] llc support for ARM predication ?
...on set that provides a subset of the ARM
instruction set and was intended to provide the amount of functionality
that compilers required and no more, to reduce codesize in compiled images.
What was "thumb" became referred to as "thumb1" after "thumb2" was
released (armv6t2), which added features such as condition execution
(the IT, "if-then-else" instruction).
The ARM architecture is numbered sequentially by evolution, so Thumb is
available in v4t (meaning "v4 with Thumb extension") and Thumb-2 is
available in v6t2.
v7 includes Thumb-2 by defaul...
2012 Jun 04
1
[LLVMdev] llc support for ARM predication ?
...of the ARM
> instruction set and was intended to provide the amount of functionality
> that compilers required and no more, to reduce codesize in compiled
> images.
>
> What was "thumb" became referred to as "thumb1" after "thumb2" was
> released (armv6t2), which added features such as condition execution
> (the IT, "if-then-else" instruction).
>
> The ARM architecture is numbered sequentially by evolution, so Thumb is
> available in v4t (meaning "v4 with Thumb extension") and Thumb-2 is
> available in v6t2.
>...
2012 May 30
2
[LLVMdev] llc support for ARM predication ?
Hi James,
Thanks for the answer, can you elaborate on difference between thumb, thumb2, ARM, thumbv7.
I'm a bit lost right now. When specifying thumbv7 llc will generate thumb only code, not thumb2 ?
Best Regards
Seb
> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
> On Behalf Of James Molloy
> Sent: Tuesday, May 29,
2009 Dec 02
2
[LLVMdev] thumb2 has divide instructions
Anton Korobeynikov wrote:
> Hello
> "T2Divide" should be a subtarget feature bit. This way it can be
> "automatically" assigned to the procesor.
I agree this is a better approach.
> The instruction selection patterns for t2{S,U}DIV should be also
> guarded by this predicate.
Is this necessary? Since the absence of the predicate causes lowering to
expand
2009 Dec 02
0
[LLVMdev] thumb2 has divide instructions
Hello
> Is this necessary? Since the absence of the predicate causes lowering to
> expand divides, the pattern should never show up.
Just to guard codegen bugs. If anything went wrong (when predicates
will be used) then you'll get nice assertion "cannot yet select".
> Agreed. Now how do we get this done?
Just look how ArmV7A is defined and do something similar...
--
2016 Jul 31
1
[Release-testers] [3.9 Release] Release Candidate 1 has been tagged
On 29 July 2016 at 23:57, Hans Wennborg via Release-testers
<release-testers at lists.llvm.org> wrote:
> There are still open merge requests and bugs, but I'd like to get the
> real testing started to see where we're at.
First wave of testing pass on ARM. Uploaded to the FTP server.
Is it time to do the back-ports planned? I only have a very minor bug fix.
cheers,
--renato
2014 Jul 09
5
[LLVMdev] [PATCH][REQUEST] Could someone submit this CSR Kalimba definitions patch please?
...standard portable IR for OpenCL 64-bit version
+ kalimba // Kalimba: generic kalimba
};
- enum SubArchType {
- NoSubArch,
-
- ARMSubArch_v8,
- ARMSubArch_v7,
- ARMSubArch_v7em,
- ARMSubArch_v7m,
- ARMSubArch_v7s,
- ARMSubArch_v6,
- ARMSubArch_v6m,
- ARMSubArch_v6t2,
- ARMSubArch_v5,
- ARMSubArch_v5te,
- ARMSubArch_v4t,
- ARMSubArch_v4
- };
enum VendorType {
UnknownVendor,
@@ -104,7 +89,8 @@
BGQ,
Freescale,
IBM,
- NVIDIA
+ NVIDIA,
+ CSR
};
enum OSType {
UnknownOS,
@@ -164,9 +150,6 @@
/// The...