search for: v4p0i64

...e parameter. If we had multiple parameters with complex types, I think it might become harder to read if we separated each component, .e.g., a hypothetical intrinsic that takes a vector of 4 of pointers to i32 and vector of 4 of pointers to i64 would look either like @intrinsic.v4p0i32.v4p0i64 or @intrinsic.v4.p0.i32.v4.p0.i64 I find the former a little easier to parse. What do you all think? -- Mon Ping On Jul 7, 2008, at 2:40 AM, Benedict Gaster wrote: > Hi, > > Great I look forward to the patch! > > One comment I had was on the name of the overloaded intrin...

.... If we had multiple parameters with complex types, I think > it might become harder to read if we separated each component, .e.g., > a hypothetical intrinsic that takes a vector of 4 of pointers to i32 > and vector of 4 of pointers to i64 would look either like > @intrinsic.v4p0i32.v4p0i64 > or > @intrinsic.v4.p0.i32.v4.p0.i64 > > I find the former a little easier to parse. What do you all think? I agree, I prefer the former. -Chris > On Jul 7, 2008, at 2:40 AM, Benedict Gaster wrote: > >> Hi, >> >> Great I look forward to the patch! >&gt...

Hi, Great I look forward to the patch! One comment I had was on the name of the overloaded intrinsics. In your example you resolve the atomic.load.add to: @llvm.atomic.load.add.p0i32 // i32 ptr to default address space @llvm.atomic.load.add.p11i32 // i32 ptr to address space 11 and I was wondering could they instead be named: @llvm.atomic.load.add.p0.i32 // i32 ptr to default

Hi, I got pulled off doing other things last week but I plan to get the support for address spaces to the intrinsics this week. As Benedict noted, the problem is that we don't carry the address space information with the intrinsics. Today, we will do an implicit cast to the default address space. My change will prevent that from happening by allowing the intrinsic to have a