search for: v400

who has purchased a V400 card from Varion ? I need some help . please help me . thanks a lot

...code that isn't used by current backends in tree isn't great. These are the MVT's that we have added: 16x16 element (2D SIMD) 1-bit predicate registers: v256i1 16x16 element (2D SIMD) 16-bit registers: v256i16 20x20 element (2D SIMD) 16-bit registers: (we round up to v512 instead of v400): v512i16 32-bit versions of the above 16-bit registers (to represent 32-bit accumulators for MAD instructions and also dual-issue "wide" instructions to the dual non-MAD ALU's in each lane) v256i32 v512i32 For those interested in more details about Pixel Visual Core, the 6th editi...

...#39;t used by current backends in tree isn't great. These are the MVT's that we have added: 16x16 element (2D SIMD) 1-bit predicate registers: v256i1 16x16 element (2D SIMD) 16-bit registers: v256i16 20x20 element (2D SIMD) 16-bit registers: (we round up to v512 instead of v400): v512i16 32-bit versions of the above 16-bit registers (to represent 32-bit accumulators for MAD instructions and also dual-issue "wide" instructions to the dual non-MAD ALU's in each lane) v256i32 v512i32 For those interested in more details about Pixel Visual Core, th...

...ring:: >+SelectAddrRegReg(SDValue N, SDValue &Base, SDValue &Index, SelectionDAG &DAG) { Move this to ISelDAGToDAG file >+bool MBlazeTargetLowering:: >+SelectAddrRegImm(SDValue N, SDValue &Disp, SDValue &Base, SelectionDAG &DAG) { Likewise >+def : Proc<"v400", []>; >+def : Proc<"v500", []>; >+def : Proc<"v600", []>; >+def : Proc<"v700", []>; >+def : Proc<"v710", []>; What's the difference between them then? isVN00() predicates are not used. >+ DataLayout(std::s...

...he MVT's that we have added: > > > > 16x16 element (2D SIMD) 1-bit predicate registers: > > v256i1 > > > > 16x16 element (2D SIMD) 16-bit registers: > > v256i16 > > > > 20x20 element (2D SIMD) 16-bit registers: (we round up to v512 instead of > v400): > > v512i16 > > > > 32-bit versions of the above 16-bit registers (to represent 32-bit > accumulators for MAD instructions and also dual-issue "wide" instructions > to the dual non-MAD ALU's in each lane) > > v256i32 > > v512i32 > > > &gt...

On Jan 29, 2010, at 9:42 AM, Wesley Peck wrote: > I have been working on a LLVM backend for the MicroBlaze soft-processor: > http://www.xilinx.com/tools/microblaze.htm > http://en.wikipedia.org/wiki/MicroBlaze Very Cool! > Attached is the initial MicroBlaze patch. It does the following: > 1. Adds mblaze as a target in configure and configure.ac > 2. Adds mblaze specific

...alue &Base, SDValue &Index, SelectionDAG &DAG) { > Move this to ISelDAGToDAG file > >> +bool MBlazeTargetLowering:: >> +SelectAddrRegImm(SDValue N, SDValue &Disp, SDValue &Base, SelectionDAG &DAG) { > Likewise Done. > >> +def : Proc<"v400", []>; >> +def : Proc<"v500", []>; >> +def : Proc<"v600", []>; >> +def : Proc<"v700", []>; >> +def : Proc<"v710", []>; > What's the difference between them then? isVN00() predicates are not used....

I have been working on a LLVM backend for the MicroBlaze soft-processor: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze Attached is the initial MicroBlaze patch. It does the following: 1. Adds mblaze as a target in configure and configure.ac 2. Adds mblaze specific intrinsics in include/llvm/IntrinsicsMBlaze.td and include/llvm/Intrinsics.td 3. Adds mblaze

...ine, and it also worked nicely before on windows. I run ruby 1.8.6 and installed it with the one-click installer for Windows. Best regards! Kristofer, Sweden ArgumentError in Admin portal srv propController#srv_prop_cmd wrong number of arguments (0 for 1) RAILS_ROOT: F:/srv/dreamgallery/content/v400 Application Trace | Framework Trace | Full Trace f:/ruby/lib/ruby/gems/1.8/gems/hpricot-0.6.164-x86-mswin32/lib/hpricot/elements.rb:395:in `proc'' f:/ruby/lib/ruby/gems/1.8/gems/hpricot-0.6.164-x86-mswin32/lib/hpricot/elements.rb:395 f:/ruby/lib/ruby/site_ruby/1.8/rubygems/custom_require....