search for: v2i

Dear All, Thanks a lot for the useful help again. I manage to get it done up to a point where I think I just need to apply some smoothing/interpolation to get denser points, to make it nice. Basically, I started from Duncen's script to visualize and make the clipping along a plane at a slice. Then I map my data points' values to a color palette and just plot them as points on this plane.

Good to hear you've made such progress. Just a couple of comments: - You should use points3d() rather than rgl.points(). The latter is a low level function that may have unpleasant side effects, especially mixing it with other *3d() functions like persp3d(). - There are several ways to draw a flat surface to illustrate your data. Which one to use really depends on the form of data.

> It should be a 2D slice/plane embedded into a 3D space. I was able to come up with the plot, attached. My intention was to plot national boundaries on the surface of a sphere. And put the slice inside. However, I haven't (as yet) worked out how to get the coordinates for the boundaries. Let me know, if of any value. And I'll post the code. (But needs to be polished first)

Thanks for your idea. It should be a 2D slice/plane embedded into a 3D space. Could be static, I just need to make a single figure from it for illustration of the Earth together with its interior in 3D. So, the interior would be a slice in 2D along a fixed longitude. And along this 2D slice would be a heatmap. Again, embedded in 3D, since it would be shown as a slice of Earth in 3D. Duncan?s

...gt; Does that look right to you? Yes, and it fixes the problem. What's your opinion about how TargetData and X86Subtarget define ABI alignment for SSE registers? I think that's suspect too. It's too bad we can't specify separate ABI alignments for v16i/f8, v8i/f16, v4i/f32 and v2i/f64 as we should probably set the ABI alignment to the element alignment. But I guess to be conservative we should set it to 8 bits. Unless I'm misunderstanding the purpose of the ABI alignment. -Dave

...trinsics.td : let TargetPrefix = "x86" in { def int_x86_max_qb: GCCBuiltin<"__builtin_x86_max_qb">, Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; } In src//tools/clang/include/clang/Basic/BuiltinsX86.def TARGET_BUILTIN(__builtin_x86_max_qb, "V2iV2iV2i", "ncV:64:", "") //I don't know the meaning of these parameters, just write according to the add function. In src/tools/clang/lib/CodeGen/CGBuiltin.cpp. in function EmitX86BuiltinExpr case X86::BI__builtin_x86_max_qb:{ return Builder.CreateCall(CGM.getIntrinsic(In...

...ced testcase for this, please add it. > What's your opinion about how TargetData and X86Subtarget define ABI > alignment > for SSE registers? I think that's suspect too. It's too bad we > can't specify > separate ABI alignments for v16i/f8, v8i/f16, v4i/f32 and v2i/f64 as > we > should probably set the ABI alignment to the element alignment. But > I guess > to be conservative we should set it to 8 bits. Unless I'm > misunderstanding > the purpose of the ABI alignment. The purpose of ABI alignment is to govern things like struct...

I agree, that doesn't look right. It looks like this is what was intended: Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp (revision 65000) +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (working copy) @@ -4903,9 +4903,9 @@ // resultant store does not need a higher alignment than

...nt zero must come from index 0 or 1. For 32-bit elements, result element zero must come from index 0-3. In isSHUFPMask all we have is the SDNode of the shufflevector index vector. Unfortunately, this tells us nothing about the type of the result vector. If we have two operands, we obviously have a v2i/f64 vector. For eight operands, we have a v8i/f32 vector. But for four operands we could have a v4f/i32 or a v4f/i64. So we can't know the vector element size and thus we can't map shufflevector indices valid ranges for output vector elements. If I change isSHUFPMask to take an extra a...

I got bit by this in LLVM 2.4 DagCombiner.cpp and it's still in trunk: SDValue DAGCombiner::visitSTORE(SDNode *N) { [...] // If this is a store of a bit convert, store the input value if the // resultant store does not need a higher alignment than the original. if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore() && ST->isUnindexed()) {

Hello list. I'm trying to rebuild the 2.6.9.67.0.20.EL kernel, but it fails even without modifications. How did I try it? Created a (non-root) build environment (not a mock ) Installed the kernel.scr.rpm and did a rpmbuild -ba --target=`uname -m` kernel-2.6.spec 2> prep-err.log | tee prep-out.log The build failed at the end: Processing files: kernel-xenU-devel-2.6.9-67.0.20.EL Checking

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