Displaying 2 results from an estimated 2 matches for "v2f16".
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v1f16
2018 Apr 09
2
A way to opt out of a dag combine?
...g of
x86-64 vector code doesn't show the error. I think the other in tree
targets would notice the vector transform getting the answer wrong (it's
harder to confirm without hardware), so the bug is probably inert for in
tree targets.
Given a v4f16 instance t2, the DAG describes building a v2f16 vector from
elements [0, 2]. The combine translates this to building a vector from
elements [0, 0]. The problem seems to be treating extract_subvector with
different constants as instances of the same value.
t14: v2f16 = extract_subvector t2, Constant:i32<2>
t15: f16 = extract_vector_elt t...
2017 Jan 23
2
Changes to TableGen in v4.0?
I am trying to upgrade to the LLVM v4.0 branch, but I am seeing failures in
my TableGen descriptions for conversion from FP32 to FP16 (scalar and
vector).
The patterns I have are along the lines of:
[(set (f16 RF16:$dst), (fround (f32 RF32:$src)))]
or:
[(set (v2f16 VF16:$dst), (fround (v2f32 VF32:$src)))]
and these now produce the errors:
error: In CONV_f32_f16: Type inference contradiction found, merging 'f32'
into 'f16'
or:
error: In CONV_v2f32_v2f16: Type inference contradiction found, merging
'v2f32' into 'v2f16'...