search for: v16i

...ST->isVolatile()) || > > Does that look right to you? Yes, and it fixes the problem. What's your opinion about how TargetData and X86Subtarget define ABI alignment for SSE registers? I think that's suspect too. It's too bad we can't specify separate ABI alignments for v16i/f8, v8i/f16, v4i/f32 and v2i/f64 as we should probably set the ABI alignment to the element alignment. But I guess to be conservative we should set it to 8 bits. Unless I'm misunderstanding the purpose of the ABI alignment. -Dave

...f you have a reasonably reduced testcase for this, please add it. > What's your opinion about how TargetData and X86Subtarget define ABI > alignment > for SSE registers? I think that's suspect too. It's too bad we > can't specify > separate ABI alignments for v16i/f8, v8i/f16, v4i/f32 and v2i/f64 as > we > should probably set the ABI alignment to the element alignment. But > I guess > to be conservative we should set it to 8 bits. Unless I'm > misunderstanding > the purpose of the ABI alignment. The purpose of ABI alignment is...

I agree, that doesn't look right. It looks like this is what was intended: Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp (revision 65000) +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (working copy) @@ -4903,9 +4903,9 @@ // resultant store does not need a higher alignment than

I got bit by this in LLVM 2.4 DagCombiner.cpp and it's still in trunk: SDValue DAGCombiner::visitSTORE(SDNode *N) { [...] // If this is a store of a bit convert, store the input value if the // resultant store does not need a higher alignment than the original. if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore() && ST->isUnindexed()) {