Displaying 1 result from an estimated 1 matches for "uxtw".
Did you mean:
sxtw
2019 Jan 31
2
[RFC] arm64_32: upstreaming ILP32 support for AArch64
...the fact that all AArch64 addressing modes do 64-bit
arithmetic (unlike amd64, which can be told to do 32-bit arithmetic).
For the non-experts, AArch64 allows calculations like these to appear
in loads and stores:
[x0, x1] == (add x0, x1)
[x0, w1, sxtw] == (add x0, (sext w1))
[x0, w1, uxtw] == (add x0, (zext w1))
[x0, w1, sxtw #3] == (add x0, (shl (sext w1), 3))
Plus some more shift modes that are even less relevant here.
The second is particularly important for arm64_32 since it mirrors GEP
semantics.
The first issue is that nothing except an inbounds GEP can really make
u...