Displaying 8 results from an estimated 8 matches for "util_last_bit".
2014 May 29
1
[PATCH 4/4] nvc0/ir: Handle OP_BFIND when folding constant expressions
...56,20 @@ ConstantFolding::expr(Instruction *i,
}
break;
}
+ case OP_BFIND: {
+ int shift = 0;
+ if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
+ shift = 32 - (b->data.u32 & 0xff);
+ switch (i->dType) {
+ case TYPE_S32:
+ res.data.s32 = util_last_bit_signed(a->data.s32 >> shift)- 1; break;
+ case TYPE_U32:
+ res.data.u32 = util_last_bit(a->data.u32 >> shift) -1; break;
+ default:
+ return;
+ }
+ break;
+ }
default:
return;
}
--
1.8.4.5
2014 Jun 03
8
[PATCH v2 0/4] Constant folding of new Instructions
And another try for constant folding of Instructions for nvc0.
Please Review this!
Thanks,
Tobias Klausmann
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant expressions
2014 Jun 03
0
[PATCH v2 3/4] nvc0/ir: Handle OP_BFIND when folding constant expressions
...drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -948,6 +948,24 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
case OP_EX2:
unary(i, imm0);
break;
+ case OP_BFIND: {
+ int32_t res;
+ switch (i->dType) {
+ case TYPE_S32:
+ res = util_last_bit_signed(imm0.reg.data.s32) - 1; break;
+ case TYPE_U32:
+ res = util_last_bit(imm0.reg.data.u32) -1; break;
+ default:
+ return;
+ }
+ if ((i->subOp == NV50_IR_SUBOP_BFIND_SAMT) && (res >= 0))
+ res = 31 - res;
+ i->setSrc(0, new_Imm...
2014 May 29
4
Add constant folding for new opcodes
Hi,
please review the following 4 patches:
1b1cfc6 nvc0/ir: Handle OP_BFIND when folding constant expressions
d2d2727 nvc0/ir: Handle OP_POPCNT when folding constant expressions
86a1ee6 nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
84563bf nvc0/ir: clear subop when folding constant expressions
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 39
2015 Sep 03
10
[PATCH mesa 0/4] nv30: Various fixes
Hi All,
Here is a bunch of fixes for nv30 cards, the first patch is a resend of
a patch I send a while back. AFAICT that one is ready for merging, but
it is not entirely clear to me what the process is for getting (nouveau)
mesa patches merged.
Should I request commit rights, and push my own patches once they have
been reviewed ?
Regards,
Hans
2014 Jun 03
6
[PATCH v3 0/4] Constant folding of new Instructions
Yet another try for constant folding of Instructions for nvc0.
Please Review this again! (Hopefully the last time ;-) )
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant
2015 Aug 19
5
[PATCH 1/2] nvc0/ir: detect AND/SHR pairs and convert into EXTBF
...src->op == OP_SHR &&
+ src->src(1).getImmediate(imm1) &&
+ i->src(t).mod == Modifier(0) &&
+ util_is_power_of_two(imm0.reg.data.u32 + 1)) {
+ // low byte = offset, high byte = width
+ uint32_t ext = (util_last_bit(imm0.reg.data.u32) << 8) | imm1.reg.data.u32;
+ i->op = OP_EXTBF;
+ i->setSrc(0, src->getSrc(0));
+ i->setSrc(1, new_ImmediateValue(prog, ext));
}
}
break;
--
2.4.6
2015 Aug 10
2
"enable dri3 support without glamor" causes gnome-shell regression on nv4x
Hi,
On 03-08-15 20:09, Ilia Mirkin wrote:
> On Mon, Aug 3, 2015 at 1:31 PM, Hans de Goede <hdegoede at redhat.com> wrote:
>> Hi,
>>
>>
>> On 03-08-15 17:36, Ilia Mirkin wrote:
>>>
>>> On Mon, Aug 3, 2015 at 9:02 AM, Hans de Goede <hdegoede at redhat.com> wrote:
>>>>
>>>> Hi,
>>>>
>>>> On