search for: uswc

...e this is only a 32bit system I couldn't really test any OpenGL game > that well. > > But for glxgears switching from AGP to PCIe mode seems to result in a > roughly 5% performance drop. > > The surprising reason for this is not the better TLB performance, but > the lack of USWC support for the PCIe GART in radeon. > > > So if anybody wants to get his hands dirty and squeeze a bit more > performance out of the old hardware, porting USWC from amdgpu to radeon > shouldn't be to much of a problem. We do support USWC on radeon, although I think we had separ...

...m I couldn't really test any OpenGL game >> that well. >> >> But for glxgears switching from AGP to PCIe mode seems to result in a >> roughly 5% performance drop. >> >> The surprising reason for this is not the better TLB performance, but >> the lack of USWC support for the PCIe GART in radeon. >> >> >> So if anybody wants to get his hands dirty and squeeze a bit more >> performance out of the old hardware, porting USWC from amdgpu to radeon >> shouldn't be to much of a problem. > We do support USWC on radeon, altho...

Unfortunately AGP is still to widely used as we could just drop support for using its GART. Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART. For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available. Please comment, Christian.

...Ie mode perfectly fine. Since this is only a 32bit system I couldn't really test any OpenGL game that well. But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop. The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon. So if anybody wants to get his hands dirty and squeeze a bit more performance out of the old hardware, porting USWC from amdgpu to radeon shouldn't be to much of a problem. Summing it up I'm still leaning towards disabling AGP completely by defaul...

...this is only a 32bit system I couldn't really test any OpenGL game > that well. > > But for glxgears switching from AGP to PCIe mode seems to result in a > roughly 5% performance drop. > > The surprising reason for this is not the better TLB performance, but > the lack of USWC support for the PCIe GART in radeon. I suspect the main reason it's only 5% is that PCIe GART page tables are stored in VRAM, so they don't need to be fetched across the PCIe link (and presumably it has more than one TLB entry as well). The difference is much bigger with native AGP ASICs w...

...m I couldn't really test any OpenGL game >> that well. >> >> But for glxgears switching from AGP to PCIe mode seems to result in a >> roughly 5% performance drop. >> >> The surprising reason for this is not the better TLB performance, but >> the lack of USWC support for the PCIe GART in radeon. > I suspect the main reason it's only 5% is that PCIe GART page tables are > stored in VRAM, so they don't need to be fetched across the PCIe link > (and presumably it has more than one TLB entry as well). The difference > is much bigger with...

...83]: ..done [ 26.009668] fglrx_pci 0000:01:00.0: irq 56 for MSI/MSI-X [ 26.010357] [fglrx] Firegl kernel thread PID: 1372 [ 26.010532] [fglrx] Firegl kernel thread PID: 1373 [ 26.010615] [fglrx] Firegl kernel thread PID: 1374 [ 26.010736] [fglrx] IRQ 56 Enabled [ 26.178909] [fglrx] Gart USWC size:1216 M. [ 26.178913] [fglrx] Gart cacheable size:482 M. [ 26.178917] [fglrx] Reserved FB block: Shared offset:0, size:1000000 [ 26.178919] [fglrx] Reserved FB block: Unshared offset:f931000, size:3cf000 [ 26.178921] [fglrx] Reserved FB block: Unshared offset:3fff4000, size:c000 [156...

On Sun, Nov 07 2010 at 6:05pm -0500, Andi Kleen <andi@firstfloor.org> wrote: > On Sun, Nov 07, 2010 at 10:39:23PM +0100, Milan Broz wrote: > > On 11/07/2010 08:45 PM, Andi Kleen wrote: > > >> I read about barrier-problems and data getting to the partition when > > >> using dm-crypt and several layers so I don''t know if that could be > >