Displaying 5 results from an estimated 5 matches for "ustatus_addr".
2014 Jan 16
2
[PATCH] drm/nv50/graph: add more trap names to print on error
...{ 0x00000200, "ZETA_STORAGE_TYPE_MISMATCH" },
+ { 0x00000400, "RT_STORAGE_TYPE_MISMATCH" },
+ { 0x00000800, "DST2D_LINEAR_MISMATCH" },
+ { 0x00001000, "RT_LINEAR_MISMATCH" },
+ {}
+};
+
+static u32
+nv50_priv_prop_trap(struct nv50_graph_priv *priv,
+ u32 ustatus_addr, u32 ustatus, u32 tp)
+{
+ u32 e0c = nv_rd32(priv, ustatus_addr + 0x04);
+ u32 e10 = nv_rd32(priv, ustatus_addr + 0x08);
+ u32 e14 = nv_rd32(priv, ustatus_addr + 0x0c);
+ u32 e18 = nv_rd32(priv, ustatus_addr + 0x10);
+ u32 e1c = nv_rd32(priv, ustatus_addr + 0x14);
+ u32 e20 = nv_rd32(priv, ustatus_...
2014 Jan 16
0
[PATCH] drm/nv50/graph: add more trap names to print on error
..."RT_STORAGE_TYPE_MISMATCH" },
> + { 0x00000800, "DST2D_LINEAR_MISMATCH" },
> + { 0x00001000, "RT_LINEAR_MISMATCH" },
> + {}
> +};
> +
> +static u32
> +nv50_priv_prop_trap(struct nv50_graph_priv *priv,
> + u32 ustatus_addr, u32 ustatus, u32 tp)
> +{
> + u32 e0c = nv_rd32(priv, ustatus_addr + 0x04);
> + u32 e10 = nv_rd32(priv, ustatus_addr + 0x08);
> + u32 e14 = nv_rd32(priv, ustatus_addr + 0x0c);
> + u32 e18 = nv_rd32(priv, ustatus_addr + 0x10);
> + u32 e1c = nv_rd32(pr...
2010 Mar 01
0
[PATCH 2/2 V2] drm/nv50: Improve PGRAPH interrupt handling.
...id);
+}
+
+static void
+nv50_pgraph_tp_trap(struct drm_device *dev, int type, uint32_t ustatus_old,
+ uint32_t ustatus_new, int display, const char *name)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ int tps = 0;
+ uint32_t units = nv_rd32(dev, 0x1540);
+ int i, r;
+ uint32_t ustatus_addr, ustatus;
+ for (i = 0; i < 16; i++) {
+ if (!(units & (1 << i)))
+ continue;
+ if (dev_priv->chipset < 0xa0)
+ ustatus_addr = ustatus_old + (i << 12);
+ else
+ ustatus_addr = ustatus_new + (i << 11);
+ ustatus = nv_rd32(dev, ustatus_addr) & 0x7fffffff;...
2010 Feb 28
1
[PATCH 1/2] drm/nv50: Make ctxprog wait until interrupt handler is done.
This will fix races between generated ctxprogs and interrupt handler.
Signed-off-by: Marcin Ko?cielnicki <koriakin at 0x04.net>
---
drivers/gpu/drm/nouveau/nv50_grctx.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c b/drivers/gpu/drm/nouveau/nv50_grctx.c
index d105fcd..9f909ab 100644
---
2014 Feb 14
0
[PATCH] drm/nv50/gr: decode texture trap status code
...0x00000020, "WRONG_MEMTYPE" },
+ {}
+};
+
static const struct nouveau_bitfield nv50_graph_trap_m2mf[] = {
{ 0x00000001, "NOTIFY" },
{ 0x00000002, "IN" },
@@ -532,6 +541,13 @@ nv50_priv_tp_trap(struct nv50_graph_priv *priv, int type, u32 ustatus_old,
for (r = ustatus_addr + 4; r <= ustatus_addr + 0x10; r += 4)
nv_error(priv, "\t0x%08x: 0x%08x\n", r,
nv_rd32(priv, r));
+ if (ustatus) {
+ nv_error(priv, "%s - TP%d:", name, i);
+ nouveau_bitfield_print(nv50_tex_traps,
+ ustatus);
+ pr_cont("\n");...