Displaying 2 results from an estimated 2 matches for "ushashau1".
2014 Sep 23
2
[LLVMdev] Use of llvm.prefetch intrinsic for basicblock prefetching
Hi,
Thanks,
I am targetting x86 architecture.
-Usha
On Mon, Sep 22, 2014 at 10:39 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> ----- Original Message -----
> > From: "usha shau" <ushashau1 at gmail.com>
> > To: llvmdev at cs.uiuc.edu
> > Sent: Monday, September 22, 2014 7:01:20 AM
> > Subject: [LLVMdev] Use of llvm.prefetch intrinsic for basicblock
> prefetching
> >
> > Hi,
> >
> >
> > I am new to LLVM and using it for my project...
2014 Sep 22
2
[LLVMdev] Use of llvm.prefetch intrinsic for basicblock prefetching
Hi,
I am new to LLVM and using it for my project where I want to perform
software prefetching of code blocks.
I am not able to use the llvm.prefetch instruction to fetch a block of code
in instruction cache. The LangRef
<http://llvm.org/docs/LangRef.html#llvm-prefetch-intrinsic>manual mentions
that giving last argument as '0' performs prefetch on instruction cache.
However, I get