Displaying 6 results from an estimated 6 matches for "user_get".
2009 Sep 17
1
[PATCH 1/3] drm/nouveau: change channel regs mapping to ioremap
...s %d\n", ret);
+ chan->user = ioremap(pci_resource_start(dev->pdev, 0) + user,
+ PAGE_SIZE);
+ if (!chan->user) {
+ NV_ERROR(dev, "ioremap of regs failed.\n");
nouveau_channel_free(chan);
- return ret;
+ return -ENOMEM;
}
chan->user_put = 0x40;
chan->user_get = 0x44;
@@ -412,7 +411,7 @@ nouveau_channel_free(struct nouveau_channel *chan)
nouveau_notifier_takedown_channel(chan);
if (chan->user)
- drm_rmmap(dev, chan->user);
+ iounmap(chan->user);
dev_priv->fifos[chan->id] = NULL;
dev_priv->fifo_alloc_count--;
diff --git a/d...
2009 Aug 21
4
[PATCH] drm/nouveau: rewrite nouveau_dma_wait()
...ivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index e1a0adb..8930420 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -113,8 +113,13 @@ READ_GET(struct nouveau_channel *chan, uint32_t *get)
val = nvchan_rd32(chan->user_get);
if (val < chan->pushbuf_base ||
- val >= chan->pushbuf_base + chan->pushbuf_bo->bo.mem.size)
+ val >= chan->pushbuf_base + chan->pushbuf_bo->bo.mem.size) {
+ /* meaningless to dma_wait() except to know whether the
+ * GPU has stalled or not
+ */
+ *ge...
2009 Aug 20
4
[PATCH 1/4] drm/nouveau: refactor nouveau_dma_wait()
A cleanup of nouveau_dma_wait(): extract a sub-function and eliminate
two variables to improve readability.
No functional changes.
Signed-off-by: Pekka Paalanen <pq at iki.fi>
---
drivers/gpu/drm/nouveau/nouveau_dma.c | 72 ++++++++++++++++++---------------
1 files changed, 39 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c
2009 Aug 04
5
[PATCH 1/6] drm/nouveau: bo read/write wrappers for nv04_crtc.c
Introduce accessors for TTM buffer object memory that has been mapped
into the kernel virtual address space or as IO memory. IO memory needs
to be accessed via special accessor functions, not by dereferencing the
iomem cookie. The wrappers hide the details of 32-bit access and honour
the TTM map type.
nv04_crtc_cursor_set() is changed to use the new wrappers. 'cursor' is
received from
2012 Feb 03
3
[PATCH 1/4] nouveau: Allow allocating BOs at specific offsets
...TM_PL_FLAG_VRAM);
diff --git a/drivers/gpu/drm/nouveau/nv50_evo.c b/drivers/gpu/drm/nouveau/nv50_evo.c
index 9b962e9..0c879b6 100644
--- a/drivers/gpu/drm/nouveau/nv50_evo.c
+++ b/drivers/gpu/drm/nouveau/nv50_evo.c
@@ -117,7 +117,7 @@ nv50_evo_channel_new(struct drm_device *dev, int chid,
evo->user_get = 4;
evo->user_put = 0;
- ret = nouveau_bo_new(dev, 4096, 0, TTM_PL_FLAG_VRAM, 0, 0,
+ ret = nouveau_bo_new(dev, 0, 4096, 0, TTM_PL_FLAG_VRAM, 0, 0,
&evo->pushbuf_bo);
if (ret == 0)
ret = nouveau_bo_pin(evo->pushbuf_bo, TTM_PL_FLAG_VRAM);
@@ -332,7 +332,7 @@ nv50_evo_...
2015 Aug 31
8
[RFC PATCH v2 0/5] More explicit pushbuf error handling
Hi there,
Resending these now that they've had some more polish and testing, and I heard
that Ben's vacation is over :-)
These patches work as a starting point for more explicit error mechanisms and
better robustness. At the moment, when a job hangs or faults, it seems that
nouveau doesn't quite know how to handle the situation and often results in a
hang. Some of these situations