Displaying 6 results from an estimated 6 matches for "use_nodbg_begin".
2012 Aug 31
0
[LLVMdev] Assert in LiveInterval update
...dex OldIdx) {
SlotIndex LastUse = NewIdx;
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
for (MCRegUnitRootIterator Roots(Reg, &TRI); Roots.isValid(); ++Roots)
{
unsigned Root = *Roots;
for (MachineRegisterInfo::use_nodbg_iterator
UI = MRI.use_nodbg_begin(Root),
UE = MRI.use_nodbg_end();
UI != UE; UI.skipInstruction()) {
const MachineInstr* MI = &*UI;
SlotIndex InstSlot =
LIS.getSlotIndexes()->getInstructionIndex(MI);
if (InstSlot > LastUse && InstSlot < OldIdx)...
2012 Aug 31
2
[LLVMdev] Assert in LiveInterval update
Hi Lang,
Just one more quick question. in LiveIntervalAnalysis.cpp In
SlotIndex findLastUseBefore(unsigned Reg, SlotIndex OldIdx)
Did you really mean to use
for (MachineRegisterInfo::use_nodbg_iterator
UI = MRI.use_nodbg_begin(Reg),
UE = MRI.use_nodbg_end();
UI != UE; UI.skipInstruction()) {}
Aren't we currently dealing with units, not registers ?
SlotIndex LastUse = findLastUseBefore(LI->reg, OldIdx);
.and isn't MRI.use_nodbg_begin(Reg) expects a register, not a unit? .or...
2012 Apr 10
1
[LLVMdev] Bug in MachineRegisterInfo ?
Hi,
I wanted to see the non-debug uses of register 0 (Noreg) and so, I wrote the
following piece of code.
*****
MRI = &MF.getRegInfo();
if (!MRI->use_nodbg_empty(0)) {
for (MachineRegisterInfo::use_nodbg_iterator
ri = MRI->use_nodbg_begin(0), re = MRI->use_nodbg_end();
ri != re; ++ri) {
MachineInstr *UseMI = &*ri;
UseMI->dump ();
}
}
*****
But I see that UseMI is
DBG_VALUE %noreg, 0, !"foobar"; line no:511 inlined @[ foo.cc:364:5 ]
Also, when I want to check what "isDebugVal...
2012 Sep 03
2
[LLVMdev] Assert in LiveInterval update
...(TargetRegisterInfo::isPhysicalRegister(Reg)) {****
>
> for (MCRegUnitRootIterator Roots(Reg, &TRI); Roots.isValid();
> ++Roots) {****
>
> unsigned Root = *Roots;****
>
> for (MachineRegisterInfo::use_nodbg_iterator****
>
> UI = MRI.use_nodbg_begin(Root),****
>
> UE = MRI.use_nodbg_end();****
>
> UI != UE; UI.skipInstruction()) {****
>
> const MachineInstr* MI = &*UI;****
>
> SlotIndex InstSlot =
> LIS.getSlotIndexes()->getInstructionIndex(MI);****
>
>...
2012 Aug 30
0
[LLVMdev] Assert in LiveInterval update
Hi Sergei, Andy,
Sorry - I got distracted with some other work. I'm looking into this and
PR13719 now. I'll let you know what I find out.
Sergei - thanks very much for the investigation. That should help me pin
this down.
Cheers,
Lang.
On Tue, Aug 28, 2012 at 2:33 PM, Sergei Larin <slarin at codeaurora.org> wrote:
> Andy, Lang,
>
> Thanks for the suggestion.
>
2012 Aug 28
5
[LLVMdev] Assert in LiveInterval update
Andy, Lang,
Thanks for the suggestion.
I have spent more time with it today, and I do see some strange things in
liveness update. I am not at the actual cause yet, but here is what I got so
far:
I have the following live ranges when I start scheduling a region:
R2 = [0B,48r:0)[352r,416r:5)...
R3 = [0B,48r:0)[368r,416r:5)...
R4 = [0B,32r:0)[384r,416r:4)...
R5 = [0B,32r:0)[400r,416r:4)...