Displaying 7 results from an estimated 7 matches for "us68".
2013 Jan 29
2
[LLVMdev] Apparent indeterminism in PreVerifier
...ppen during PreVerifier pass ("Preliminary module
verification"). The little I understand/assume about it, a verifier pass is
not supposed to change the code (or is it?) but in debug stream I see the
following:
Common predecessor:
*** IR Dump After Loop-Closed SSA Form Pass ***
for.body.us68: ; preds =
%for.body.lr.ph.us81, %for.body.us68
%arrayidx.us70.phi = phi i8* [ %buf.0.ph, %for.body.lr.ph.us81 ], [
%arrayidx.us70.inc, %for.body.us68 ]
%add.ptr4.us72.phi = phi i8* [ %add.ptr4.us72.gep, %for.body.lr.ph.us81 ],
[ %add.ptr4.us72.inc, %for.body....
2013 Jan 29
2
[LLVMdev] Apparent indeterminism in PreVerifier
...;). The little I understand/assume about it, a verifier
>> pass is not supposed to change the code (or is it?) but in debug stream
>> I see the
>> following:
>>
>> Common predecessor:
>>
>> *** IR Dump After Loop-Closed SSA Form Pass ***
>> for.body.us68: ; preds =
>> %for.body.lr.ph.us81, %for.body.us68
>> %arrayidx.us70.phi = phi i8* [ %buf.0.ph, %for.body.lr.ph.us81 ], [
>> %arrayidx.us70.inc, %for.body.us68 ]
>> %add.ptr4.us72.phi = phi i8* [ %add.ptr4.us72.gep,
>> %for.body.lr....
2013 Jan 29
0
[LLVMdev] Apparent indeterminism in PreVerifier
...ry module
> verification"). The little I understand/assume about it, a verifier
> pass is not supposed to change the code (or is it?) but in debug stream
> I see the
> following:
>
> Common predecessor:
>
> *** IR Dump After Loop-Closed SSA Form Pass ***
> for.body.us68: ; preds =
> %for.body.lr.ph.us81, %for.body.us68
> %arrayidx.us70.phi = phi i8* [ %buf.0.ph, %for.body.lr.ph.us81 ], [
> %arrayidx.us70.inc, %for.body.us68 ]
> %add.ptr4.us72.phi = phi i8* [ %add.ptr4.us72.gep,
> %for.body.lr.ph.us81 ], [ %add....
2013 Jan 29
0
[LLVMdev] Apparent indeterminism in PreVerifier
...ut it, a verifier
> >> pass is not supposed to change the code (or is it?) but in debug
> >> stream I see the
> >> following:
> >>
> >> Common predecessor:
> >>
> >> *** IR Dump After Loop-Closed SSA Form Pass ***
> >> for.body.us68: ; preds =
> >> %for.body.lr.ph.us81, %for.body.us68
> >> %arrayidx.us70.phi = phi i8* [ %buf.0.ph, %for.body.lr.ph.us81 ], [
> >> %arrayidx.us70.inc, %for.body.us68 ] %add.ptr4.us72.phi = phi i8* [
> >> %add.ptr4.us72.gep,
&g...
2013 Jan 29
1
[LLVMdev] Apparent indeterminism in PreVerifier
...>> pass is not supposed to change the code (or is it?) but in debug
>>>> stream I see the
>>>> following:
>>>>
>>>> Common predecessor:
>>>>
>>>> *** IR Dump After Loop-Closed SSA Form Pass ***
>>>> for.body.us68: ; preds =
>>>> %for.body.lr.ph.us81, %for.body.us68
>>>> %arrayidx.us70.phi = phi i8* [ %buf.0.ph, %for.body.lr.ph.us81 ], [
>>>> %arrayidx.us70.inc, %for.body.us68 ] %add.ptr4.us72.phi = phi i8* [
>>>> %add.ptr4.u...
2013 Jan 07
0
[LLVMdev] instruction scheduling issue
Liu,
This is likely a better solution for you - you do not want to mess with
the scheduler unless you really have to ;)
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation
> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
> On Behalf Of Krzysztof Parzyszek
> Sent:
2013 Jan 07
4
[LLVMdev] instruction scheduling issue
On 1/7/2013 2:15 PM, Xu Liu wrote:
>
> This would be ideal. How can I do the instrumentation pass after the
> instruction scheduling?
You could derive your own class from TargetPassConfig, and add the
annotation pass in YourDerivedTargetPassConfig::addPreEmitPass. This
will add your annotation pass very late, just before the final code is
emitted. If you're using the X86 target,