search for: ursi

Displaying 13 results from an estimated 13 matches for "ursi".

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2006 Nov 12
2
Headaches with Video over SIP
Greetings all, I'm playing with asterisk and two Polycom VSX300 videoconferencing units. And I'm having zero luck getting video working over SIP. The two units register fine with asterisk, and with "allow=all" in sip.conf, the two units establish voice. But no video. And no obvious messages as to whats going wrong. The config for each is (they're numbered 201 and
2015 Jan 19
2
[LLVMdev] X86TargetLowering::LowerToBT
...subclass of > *CodeGen/PeepholeOptimizer.cpp.* > > thanks. > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > > -- Ite Ursi -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150118/9927a6c4/attachment.html> -------------- next part -------------- A non-text attachment was scrubbed... Name: tst.c Type: text/x-csrc Size: 207 bytes...
2020 Jun 27
3
tablegen generated enums in tablegen
I'd like to store a tablegen generated enumeration in a record field/value. Clearly this enumeration isn't available yet so it seems that a code fragment should be the escape mechanism I need. Looking at the other backends for examples, I see things like [{ return Imm >= 0 && Imm < 64; }] // promising code Requires = [{ {} }];
2015 Jan 24
2
[LLVMdev] X86TargetLowering::LowerToBT
...ed to be written and used and that's a larger patch. > > <pat><tst64.c>_______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > -- Ite Ursi -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150124/8c3041b5/attachment.html> -------------- next part -------------- A non-text attachment was scrubbed... Name: tst64.ll Type: application/octet-stream...
2015 Jan 19
6
[LLVMdev] X86TargetLowering::LowerToBT
I'm tracking down an X86 code generation malfeasance regarding BT (bit test) and I have some questions. This IR *matches* and then *X86TargetLowering::LowerToBT **is called:* %and = and i64 %shl, %val * ; (val & (1 << index)) != 0 ; *bit test with a *register* index This IR *does not match* and so *X86TargetLowering::LowerToBT **is not called:* %and = lshr i64 %val, 25
2015 Jan 19
2
[LLVMdev] X86TargetLowering::LowerToBT
...reg and especially the reg/mem versions would be slow. However the shrq/and versions *with the same operands* would be slow as well. There's even a compiler comment about the reg/mem version saying "this is for disassembly only". But I doubt BTQ reg/imm would be microcoded. -- Ite Ursi -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150119/658be9ec/attachment.html>
2015 Jan 24
2
[LLVMdev] X86TargetLowering::LowerToBT
This is a patch to X86TargetLowering::LowerToBT() which was hashed over on the Developers list with Intel concurring. It checks whether the -Oz (optimize for size) flag is set or whether the containing function's PGO cold attribute is set. If either are true it emits BT for tests of bits 8-31 instead of TEST. Previously, TEST was always used for bits 0-31 and BT was always used for bits
2014 Jan 13
0
Re: [PATCH 1/7] Add a minimal hive with "special" keys and values
On Sat, Jan 11, 2014 at 12:12:46AM +0100, Hilko Bengen wrote: > --- > images/README | 14 ++++++++++++ > images/mkzero/Makefile | 9 ++++++++ > images/mkzero/mkzero.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++ > images/special | Bin 0 -> 8192 bytes > 4 files changed, 82 insertions(+) > create mode 100644 images/mkzero/Makefile >
2014 Jan 10
14
[PATCH 1/7] Add a minimal hive with "special" keys and values
--- images/README | 14 ++++++++++++ images/mkzero/Makefile | 9 ++++++++ images/mkzero/mkzero.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++ images/special | Bin 0 -> 8192 bytes 4 files changed, 82 insertions(+) create mode 100644 images/mkzero/Makefile create mode 100644 images/mkzero/mkzero.c create mode 100644 images/special diff --git a/images/README
2020 May 12
2
BPF tablegen+codegen question
In BPF, an ADD instruction is defined as a 2 register instruction: 0x0f. add dst, src. dst += src In BPFInstrInfo.td this kind of ALU instruction is defined with: def _rr : ALU_RR<BPF_ALU64, Opc, (outs GPR:$dst), (ins GPR:$src2, GPR:$src), "$dst "#OpcodeStr#" $src", [(set
2015 Jan 22
2
[LLVMdev] X86TargetLowering::LowerToBT
...at cs.uiuc.edu> http://llvm.cs.uiuc.edu <http://llvm.cs.uiuc.edu/> >>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev <http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev> >>> >>> >>> >>> >>> -- >>> Ite Ursi >> <tst.c> >> > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev -------------- next part -------------- An HTML attachmen...
2014 Jan 14
2
Re: [PATCH 1/7] Add a minimal hive with "special" keys and values
Hi Hilko, Thanks a lot for creating this test hive! I think another thing that will trip up Registry programs is value names that include back slashes. For example, under the System hive, the key "\MountedDevices" has child values with names like "\DosDevices\C:" (the leading backslash is a part of the value name). There are many other values that include backslashes. I
2014 Jan 10
4
[PATCH] Add a minimal hive with "special" keys and values
--- images/README | 15 +++++++++++++++ images/mkzero/Makefile | 7 +++++++ images/mkzero/mkzero.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ images/special | Bin 0 -> 8192 bytes 4 files changed, 70 insertions(+) create mode 100644 images/mkzero/Makefile create mode 100644 images/mkzero/mkzero.c create mode 100644 images/special diff --git a/images/README