Displaying 3 results from an estimated 3 matches for "unspilledcs1gprs".
2013 Oct 21
1
[LLVMdev] [PATCH] Unwanted r11 in push/pop on Cortex-M.
...g.cpp
llvm-source-new/lib/Target/ARM/ARMFrameLowering.cpp
--- llvm-source/lib/Target/ARM/ARMFrameLowering.cpp 2013-07-29
10:50:07.000000000 -0700
+++ llvm-source-new/lib/Target/ARM/ARMFrameLowering.cpp 2013-10-20
16:33:59.905251552 -0700
@@ -1313,7 +1313,7 @@
for (unsigned i = 0, e = UnspilledCS1GPRs.size(); i != e; ++i) {
unsigned Reg = UnspilledCS1GPRs[i];
// Don't spill high register if the function is thumb1
- if (!AFI->isThumb1OnlyFunction() ||
+ if (!AFI->isThumbFunction() ||
isARMLowRegister(Reg) || Reg == ARM::LR) {...
2019 Jan 04
2
[RFC] Allocatable Global Register Variables for ARM
...ght want to check that prologue/epilogue emission won't emit a PUSH/POP that refers to a register reserved this way; we sometimes add an "extra" register to align the stack.
Yes, you are right.
Checking determineCalleeSaves(), we see that it maintains a number of free Register pools, UnspilledCS1GPRs, UnspilledCS2GPRs and AvailableRegs, which are used to find Registers that can be used for the extra callee saves you mentioned.
There probably are more like this. Thanks for pointing that out.
We will investigate and extend our design.
>
> Why did you decide to use global metadata here? Fo...
2018 Dec 21
2
[RFC] Allocatable Global Register Variables for ARM
Hi all,
This is a RFC on support for Global Register Variables in the Arm backend.
Whilst there has been some prior discussion about whether or not LLVM should (or even needs to) support global register variables,
today there seems to be a good measure of support for this in both Clang+LLVM (although it is currently limited to SP).
When most of this support landed there was some concern