search for: unpredic

Simon Moll <moll at cs.uni-saarland.de> writes: >> How will existing passes be taught about the new intrinsics? For >> example, what would have to be done to instcombine to teach it about >> these intrinsics? Let's suppose every existing operation had an >> equivalent masked intrinsic. Would it be easier to teach all of the >> passes about them or would

...es (or patch sets) that can be reviewed and applied individually over time, where each patch/patch-set aims to add a new instruction (or variant or addressing mode for an instruction). Each patch-set has corresponding tests to cover the added instruction. A first set of patches that implement SVE (unpredicated) ADD/SUB instructions can be found in Phabricator: - https://reviews.llvm.org/D39087 - https://reviews.llvm.org/D39088 - https://reviews.llvm.org/D39089 - https://reviews.llvm.org/D39090 - https://reviews.llvm.org/D39091 Please let me know if you have any comments or suggestions to make sharin...

...he PredRel class. let FilterClass = "PredRel"; // Instructions with the same BaseOpcode field form a row. let RowFields = ["BaseOpcode"]; // Instructions with the same predicate sense form a column. let ColFields = ["PredSense"]; // The key column is the unpredicated instructions. let KeyCol = ["nopred"]; // Value columns are predicate=true and predicate=false let ValueCols = [["true"], ["false"]]; }; That should be enough to generate a table: // key , PredSense=true, PredSense=false { ADD , ADDtrue, ADDfalse...

...uot;PredRel"; > > // Instructions with the same BaseOpcode field form a row. > let RowFields = ["BaseOpcode"]; > > // Instructions with the same predicate sense form a column. > let ColFields = ["PredSense"]; > > // The key column is the unpredicated instructions. > let KeyCol = ["nopred"]; > > // Value columns are predicate=true and predicate=false > let ValueCols = [["true"], ["false"]]; }; Can you please elaborate it more? It seems interesting but I coundn't understand it completely....

Hello, I am following up on the issue discussed at the SVE meeting, Sander mentioned that there were some patterns missing from SVE CodeGen for floating point operations, but I was unable to identify them. He mentioned something about looking at the ISelLowering for AArch64 to identify them, so if there is any information of that regard it would be greatly appreciated so we can contribute with

...>> // Instructions with the same BaseOpcode field form a row. >> let RowFields = ["BaseOpcode"]; >> >> // Instructions with the same predicate sense form a column. >> let ColFields = ["PredSense"]; >> >> // The key column is the unpredicated instructions. >> let KeyCol = ["nopred"]; >> >> // Value columns are predicate=true and predicate=false >> let ValueCols = [["true"], ["false"]]; }; > > Can you please elaborate it more? It seems interesting but I coundn't &gt...

...in it's false that it didn't succeed) you can move the successors around, and you know that placing a successor immediately after the block and calling updateTerminator() will give you a fall-through. If AnalyzeBranch() fails, you can still check if the last instruction in the block is an unpredicated barrier. If so, it is still safe to move the successors around, but that block will never be a fall-through. The canFallThrough() function implements this check. If the last instruction in the block is predicated or not a barrier, you must keep it together with its layout successor. This shoul...

...auto-vectorization using scalable vectors. Vineet Kumar already did an excellent job describing the styles of vectorization for scalable vectors in his recent proposal (http://lists.llvm.org/pipermail/llvm-dev/2020-November/146319.html). To summarise, there are three styles of vectorization: 1. Unpredicated vector body, scalar tail. 2. Predicated vector body, with scalar tail loop folded into the vector body. 3. Unpredicated vector body, predicated vector tail. We (Arm) prefer starting out with adding support for 1 in upstream LLVM, because it is the easiest to support and gives a lot of ‘bang fo...

On Wed, Oct 31, 2012 at 09:13:43PM +0100, Bjorn De Sutter wrote: > Hi all, > > I am working on a CGRA backend (something like a 2D VLIW), and we also absolutely need predication. I extended the IfConversion pass to allow it to be executed multiple times and to predicate already predicated code. This is necessary to predicate code with nested conditional statements. At this point, we

...ave this kind of relationship let FilterClass = "PredRel"; // Instructions with the same BaseOpcode value form a row. let RowFields = ["BaseOpcode"]; // Instructions with the same predicate sense form a column. let ColFields = ["PredSense"]; // The key column is the unpredicated instructions. let KeyCol = ["nopred"]; // Value columns are PredSense=true and PredSense=false let ValueCols = [["true"], ["false"]]; } Instructions need to set some fields in order for the TableGen to relate them using the information provided in 'getPredO...

Hi Everyone, After some more thoughts to the Jacob's suggestion of using multiclasses for Opcode mapping, this is what I have come up with. Please take a look at the design below and let me know if you have any suggestions/questions. I have tried to keep the design target independent so that other targets could benefit from it. 1) The idea is to add 3 new classes into

Hi all, I am working on a CGRA backend (something like a 2D VLIW), and we also absolutely need predication. I extended the IfConversion pass to allow it to be executed multiple times and to predicate already predicated code. This is necessary to predicate code with nested conditional statements. At this point, we support or, and, and conditional predicates (see Scott Mahlke's papers on this

On Tue, Oct 18, 2011 at 4:31 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote: > > On Oct 18, 2011, at 3:07 PM, Chandler Carruth wrote: > > On Tue, Oct 18, 2011 at 2:59 PM, Cameron Zwarich <zwarich at apple.com>wrote: > >> I think this should really live as a CodeGen pass. Is there any good >> reason to make it an IR pass? >> > > So, as it

...hat the old > Cray machines did with the Vector Length register. > > So in LLVM IR you would have "setvl" return a predicate and then apply > that predicate to operations using the current select method? How does > instruction selection map that back onto a simple setvl + unpredicated > vector instructions? > > For conditional code both vector length and masking must be taken into > account. If "setvl" returns a predicate then that predicate would have > to be combined in some way with the conditional predicate (typically via > an AND operation...

...dn't succeed) you can > move the successors around, and you know that placing a successor > immediately after the block and calling updateTerminator() will give you a > fall-through. > > If AnalyzeBranch() fails, you can still check if the last instruction in > the block is an unpredicated barrier. If so, it is still safe to move the > successors around, but that block will never be a fall-through. The > canFallThrough() function implements this check. > > If the last instruction in the block is predicated or not a barrier, you > must keep it together with its layo...

Hi David, >>> The name "getSizeExpressionInBits" makes me think that a Value >>> expression will be returned (something like a ConstantExpr that uses >>> vscale). I would be surprised to get a pair of integers back. Do >>> clients actually need constant integer values or would a ConstantExpr >>> sufffice? We could add a ConstantVScale or

...ly over > time, where each patch/patch-set aims to add a new instruction (or variant > or addressing mode for an instruction). Each patch-set has corresponding > tests to cover the added instruction. > > > > A first set of patches that implement SVE (unpredicated) ADD/SUB > instructions can be found in Phabricator: > > - https://reviews.llvm.org/D39087 > > - https://reviews.llvm.org/D39088 > > - https://reviews.llvm.org/D39089 > > - https://reviews.llvm.org/D39090 > > - https:/...

Jyotsna, I hadn't been following this, so I apologize if this has already been provided, but can you give a quick example of how this functionality is used? Thanks in advance, Hal On Tue, 28 Aug 2012 13:01:17 -0500 "Jyotsna Verma" <jverma at codeaurora.org> wrote: > Hi Jakob, > > Here is the first draft of the patch to add TableGen backend support > for the

...with the same BaseOpcode field form a row. > >> let RowFields = ["BaseOpcode"]; > >> > >> // Instructions with the same predicate sense form a column. > >> let ColFields = ["PredSense"]; > >> > >> // The key column is the unpredicated instructions. > >> let KeyCol = ["nopred"]; > >> > >> // Value columns are predicate=true and predicate=false let > >> ValueCols = [["true"], ["false"]]; }; > > > > Can you please elaborate it more? It seems intere...

...sue is that the predicate parameter of masked load/store basically affects the semantics of all other vector ops in the loop that do not have an explicit mask parameter: %v = masked.load ... %m ; explicit predication - okay %r = sdiv %x, %y ; implicit predication by %m for hwloops - unpredicated otherwise > And i am curious why couldn't you use the %evl parameter of VP intrinsics to get the tail predication you are interested in? In D79100<https://reviews.llvm.org/D79100>, intrinsic get.active.mask makes the backedge taken count of the scalar loop explicit. I will look...