Displaying 5 results from an estimated 5 matches for "unpedict".
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2006 Sep 18
0
[LLVMdev] how to declare that two registers must be different
..."The destination register shall not be the same as the operand
> register Rm. R15 shall not be used as an operand or as the
> destination register."
The ARM ARM has this "Operand restriction" on MUL:
Specifying the same register for <Rd> and <Rm> has UNPEDICTABLE results.
> Then, for the load and store multiple instructions, LDM and STM, the R15
> should not be used as the base register. Neither should R15 be the
> destination for an MCR, Move to Co-processor register from Register.
>
> These are some examples, hopefully enough to alter...
2006 Sep 18
4
[LLVMdev] how to declare that two registers must be different
Hi Chris,
> On Sun, 17 Sep 2006, [UTF-8] Rafael Esp?ndola wrote:
> > The ARM has a multiply instruction of the form Rd=Rm*Rs where Rd !=
> > Rm. How can I add this requirement to the instruction definition?
>
> ...
>
> I'd like to make the regalloc interfaces more powerful to be able to
> capture this sort of thing, but I'm not very familiar with ARM.
2007 Jan 31
0
Bug in R editor (PR#9487)
...e: C. E. Timothy Paine
Version: R version 2.4.1 (2006-12-18)
OS: OS X 10.4.8
Submission from: (NULL) (130.39.127.123)
When editing a script in the editor window, the following messages appear in
the R console. Any further editing in the editor will generate a new line of
error code. This occurs unpedictably when editing in the editor. Perhaps
related is the observation that when I open an existing script, and select the
text of that script, the script shifts slightly to the right.
Sorry I can;t provide better info about the problem.
Thanks for all of your work!
tim
...............R console o...
2006 Sep 18
1
[LLVMdev] how to declare that two registers must be different
...register shall not be the same as the operand
>> register Rm. R15 shall not be used as an operand or as the
>> destination register."
>
> The ARM ARM has this "Operand restriction" on MUL:
> Specifying the same register for <Rd> and <Rm> has UNPEDICTABLE results.
>
>> Then, for the load and store multiple instructions, LDM and STM, the R15
>> should not be used as the base register. Neither should R15 be the
>> destination for an MCR, Move to Co-processor register from Register.
>>
>> These are some examples,...
2006 Sep 18
2
[LLVMdev] how to declare that two registers must be different
...n register shall not be the same as the operand
>> register Rm. R15 shall not be used as an operand or as the
>> destination register."
>
> The ARM ARM has this "Operand restriction" on MUL:
> Specifying the same register for <Rd> and <Rm> has UNPEDICTABLE results.
My copy of the ARM ARM says:
"Use of R15: Specifying R15 for register <Rd>, <Rm>, or <Rs> has
UNPREDICTABLE results."
This is the same as above. However, it goes on to say:
"Operand restriction: Specifying the same register for <Rd> and <...