Displaying 2 results from an estimated 2 matches for "unopfrag".
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binopfrag
2012 Mar 26
1
[LLVMdev] Disassembly broken for thumb LDR
...d the issue down to ARMInstrThumb.td:
// A8.6.57 & A8.6.60
defm tLDR : thumb_ld_rr_ri_enc<0b100, 0b0110, t_addrmode_rrs4,
t_addrmode_is4, AddrModeT1_4,
IIC_iLoad_r, IIC_iLoad_i, "ldr",
UnOpFrag<(load node:$Src)>>;
In the generated TableGen output the issue lies around line 4992:
4992 case ARM::tUXTH: printOperand(MI, 1, O); break;
As the operand is not enough in this case.
I'm pretty stuck at the TableGen deciphering to fix the issue. It'll be nice if someone with...
2013 May 23
3
[LLVMdev] Definition of RegisterClass for load instruction in Thumb2
...t2LDRSB uses rGPR, t2LDRSB_PRE uses GPR. I wonder if lr and pc are already prevented from being allocated in pre-indexing case, because of some register hint that is being enforced?
defm t2LDRSB : T2I_ld<1, 0b00, "ldrsb", IIC_iLoad_bh_i, IIC_iLoad_bh_si,
rGPR, UnOpFrag<(sextloadi8 node:$Src)>>;
def t2LDRSB_PRE : T2Ipreldst<1, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
(ins t2addrmode_imm8:$addr),
AddrModeT2_i8, IndexModePre, IIC_iLoad_bh_iu,
"ldrsb", "...