search for: unalign_trp

...en an unaligned access occurs, whereas v7m can support unaligned accesses for many of the load and store instructions. I think it'd be important to set the CCR register on the v7m simulation so that it always generates an alignment fault in case there's an unaligned access, i.e. setting CCR.UNALIGN_TRP to 1. To check that clang indeed only produces v6m instructions when telling it to target Cortex-m0, I think we could rely on LLVM's MC layer correctly modelling if an instruction is part of v6m or not, as our internal MC Hammer test suite[1] has finally, since about 1 month ago, started passi...