Displaying 5 results from an estimated 5 matches for "umul_with_overflow".
2015 Jul 24
0
[LLVMdev] SIMD for sdiv <2 x i64>
------------------------------------ IR
------------------------------------------------------------------
if.then.i.i.i.i.i.i: ; preds = %if.then4
%S25_D = zext <2 x i32> %splatLDS17_D.splat to <2 x i64>
%umul_with_overflow.i.iS26_D = shl <2 x i64> %S25_D, <i64 3, i64 3>
%extumul_with_overflow.i.iS26_D = extractelement <2 x i64>
%umul_with_overflow.i.iS26_D, i32 1
%call5.i.i = tail call noalias i8* @_Znam(i64
%extumul_with_overflow.i.iS26_D) #22
%splatCallS27_D.splatinsert = insertelement <2...
2015 Jul 24
1
[LLVMdev] SIMD for sdiv <2 x i64>
...52 AM, zhi chen wrote:
> ------------------------------------ IR
> ------------------------------------------------------------------
> if.then.i.i.i.i.i.i: ; preds = %if.then4
> %S25_D = zext <2 x i32> %splatLDS17_D.splat to <2 x i64>
> %umul_with_overflow.i.iS26_D = shl <2 x i64> %S25_D, <i64 3, i64 3>
> %extumul_with_overflow.i.iS26_D = extractelement <2 x i64>
> %umul_with_overflow.i.iS26_D, i32 1
> %call5.i.i = tail call noalias i8* @_Znam(i64
> %extumul_with_overflow.i.iS26_D) #22
> %splatCallS27_D.splati...
2015 Jul 24
2
[LLVMdev] SIMD for sdiv <2 x i64>
On 07/24/2015 03:42 AM, Benjamin Kramer wrote:
>> On 24.07.2015, at 08:06, zhi chen <zchenhn at gmail.com> wrote:
>>
>> It seems that that it's hard to vectorize int64 in LLVM. For example, LLVM 3.4 generates very complicated code for the following IR. I am running on a Haswell processor. Is it because there is no alternative AVX/2 instructions for int64? The same thing
2013 Mar 01
5
[LLVMdev] dragon egg + llvm for fortran to c translation
hi!
I would like to know if it is feasible to use the dragon egg gcc plugin
to automatically convert fortran code to c. Having found that it is
possible to output llvm byte code back to c (at least something like
this gave me this impression/hope: llc -march=c -o test.c) I am hoping
to use dragon egg to generate the byte code from fortran 90 which than
output to c.
Does this seem feasible at
2008 Dec 09
1
[LLVMdev] [PATH] Add sub.ovf/mul.ovf intrinsics
Hi,
The attached patch implements sub.ovf/mul.ovf intrinsics similarly to
the recently added add.ovf intrinsics. These are useful for
implementing some vm instructions like sub.ovf/mul.ovf in .NET IL
efficiently. sub.ovf is supported in target independent lowering and
on x86, while mul.ovf is only supported in the x86 backend.
Please review