search for: umapped

...ges > will be process and sent to the destination, it's not optimal. First, the likelihood of such a situation is marginal, there's no point optimizing for it specifically. And second, even if that happens, you inflate the balloon right before the migration and the free memory will get umapped very quickly, so this case is covered nicely by the same technique that works for more realistic cases, too. Roman.

...ges > will be process and sent to the destination, it's not optimal. First, the likelihood of such a situation is marginal, there's no point optimizing for it specifically. And second, even if that happens, you inflate the balloon right before the migration and the free memory will get umapped very quickly, so this case is covered nicely by the same technique that works for more realistic cases, too. Roman.

Greetings All, I have tried everything I can think of and can not seem to stop the PC from cacheing a local copy of a file retrieved over a samba share. I have tried oplocks = false and also setting veto oplocks = /*.txt/ Whatever I try the PC still shows me the old version of a file after I modify it on the unix side. If anyone can see anything wrong with my smb.conf file please let me know.

On 2020/2/5 ??2:30, Michael S. Tsirkin wrote: > On Wed, Feb 05, 2020 at 01:50:28PM +0800, Jason Wang wrote: >> On 2020/2/5 ??1:31, Michael S. Tsirkin wrote: >>> On Wed, Feb 05, 2020 at 11:12:21AM +0800, Jason Wang wrote: >>>> On 2020/2/5 ??10:05, Tiwei Bie wrote: >>>>> On Tue, Feb 04, 2020 at 02:46:16PM +0800, Jason Wang wrote: >>>>>>

On 2020/2/5 ??2:30, Michael S. Tsirkin wrote: > On Wed, Feb 05, 2020 at 01:50:28PM +0800, Jason Wang wrote: >> On 2020/2/5 ??1:31, Michael S. Tsirkin wrote: >>> On Wed, Feb 05, 2020 at 11:12:21AM +0800, Jason Wang wrote: >>>> On 2020/2/5 ??10:05, Tiwei Bie wrote: >>>>> On Tue, Feb 04, 2020 at 02:46:16PM +0800, Jason Wang wrote: >>>>>>

On 2020/2/5 ??3:16, Michael S. Tsirkin wrote: > On Wed, Feb 05, 2020 at 02:49:31PM +0800, Jason Wang wrote: >> On 2020/2/5 ??2:30, Michael S. Tsirkin wrote: >>> On Wed, Feb 05, 2020 at 01:50:28PM +0800, Jason Wang wrote: >>>> On 2020/2/5 ??1:31, Michael S. Tsirkin wrote: >>>>> On Wed, Feb 05, 2020 at 11:12:21AM +0800, Jason Wang wrote:

It is impossible to have a zero length segment in descriptor tables using "normal" segments. One of many ways to properly protect segments to zero length is to map the base to an umapped page. Create a nicer way to do this, and stop subtracting 1 from the length passed to set_limit (note calling set limit with a zero limit does something very bad! - not anymore). Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.14-zach-work/include/asm-i386/desc.h ==========...

Greetings All, Does anyone know how to turn oplocks off? I have tried everything I can think of to disable this feature but each time the PC will cache the file. If anybody has turned this off please send me your configuration file. Here is the latest config file I have tried. Thanks for any help, David. [global] printing = sysv printcap name = /etc/printcap load printers = yes keepalive

Greetings All, I am trying to turn off oplocks and can not seem to figure out which parameters to use. I have tried setting oplocks = False in both the global section and in my share section. I have also tried setting veto oplock files = /*.txt/ in my share section. Each time I try this and restart the smbd program I get the same behaviour on the PC side. The file is cached on the PC side (I

It is impossible to have a zero length segment in descriptor tables using "normal" segments. One of many ways to properly protect segments to zero length is to map the base to an umapped page. Create a nicer way to do this, and stop subtracting 1 from the length passed to set_limit (note calling set limit with a zero limit does something very bad! - not anymore). Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.14-zach-work/include/asm-i386/desc.h ==========...

On Sat, Feb 1, 2014 at 1:16 PM, Alexandre Courbot <acourbot at nvidia.com> wrote: > Adapt the NVC0 BAR driver to make it able to support chips that do not > expose a BAR3. When this happens, BAR1 is then used for USERD mapping > and the BAR alloc() functions is disabled, making GPU objects unable > to rely on BAR for data access and falling back to PRAMIN. > >

...ent to the destination, it's not optimal. > > First, the likelihood of such a situation is marginal, there's no point > optimizing for it specifically. > > And second, even if that happens, you inflate the balloon right before > the migration and the free memory will get umapped very quickly, so this > case is covered nicely by the same technique that works for more > realistic cases, too. Although I wonder which is cheaper; that would be fairly expensive for the guest wouldn't it? And you'd somehow have to kick the guest before migration to do the balloonin...

From: Maarten Lankhorst <maarten.lankhorst at canonical.com> Map the GART to the bar and use that mapping, to hide all the tiling details from users. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- drivers/gpu/drm/nouveau/core/subdev/bar/nv50.c | 5 ++++- drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c | 5 ++++- drivers/gpu/drm/nouveau/nouveau_bo.c

On Wed, Feb 05, 2020 at 02:49:31PM +0800, Jason Wang wrote: > > On 2020/2/5 ??2:30, Michael S. Tsirkin wrote: > > On Wed, Feb 05, 2020 at 01:50:28PM +0800, Jason Wang wrote: > > > On 2020/2/5 ??1:31, Michael S. Tsirkin wrote: > > > > On Wed, Feb 05, 2020 at 11:12:21AM +0800, Jason Wang wrote: > > > > > On 2020/2/5 ??10:05, Tiwei Bie wrote: > >

Adapt the NVC0 BAR driver to make it able to support chips that do not expose a BAR3. When this happens, BAR1 is then used for USERD mapping and the BAR alloc() functions is disabled, making GPU objects unable to rely on BAR for data access and falling back to PRAMIN. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c | 101

...39;s not optimal. > > > > First, the likelihood of such a situation is marginal, there's no > > point optimizing for it specifically. > > > > And second, even if that happens, you inflate the balloon right before > > the migration and the free memory will get umapped very quickly, so > > this case is covered nicely by the same technique that works for more > > realistic cases, too. > > Although I wonder which is cheaper; that would be fairly expensive for the > guest wouldn't it? And you'd somehow have to kick the guest before >...

...39;s not optimal. > > > > First, the likelihood of such a situation is marginal, there's no > > point optimizing for it specifically. > > > > And second, even if that happens, you inflate the balloon right before > > the migration and the free memory will get umapped very quickly, so > > this case is covered nicely by the same technique that works for more > > realistic cases, too. > > Although I wonder which is cheaper; that would be fairly expensive for the > guest wouldn't it? And you'd somehow have to kick the guest before >...

Adapt the NVC0 BAR driver to make it able to support chips that do not expose a BAR3. When this happens, BAR1 is then used for USERD mapping and the BAR alloc() functions is disabled, making GPU objects unable to rely on BAR for data access and falling back to PRAMIN. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c | 115

On Thu, Mar 03, 2016 at 05:46:15PM +0000, Dr. David Alan Gilbert wrote: > * Liang Li (liang.z.li at intel.com) wrote: > > The current QEMU live migration implementation mark the all the > > guest's RAM pages as dirtied in the ram bulk stage, all these pages > > will be processed and that takes quit a lot of CPU cycles. > > > > From guest's point of view,

On Thu, Mar 03, 2016 at 05:46:15PM +0000, Dr. David Alan Gilbert wrote: > * Liang Li (liang.z.li at intel.com) wrote: > > The current QEMU live migration implementation mark the all the > > guest's RAM pages as dirtied in the ram bulk stage, all these pages > > will be processed and that takes quit a lot of CPU cycles. > > > > From guest's point of view,