Displaying 2 results from an estimated 2 matches for "ucr2".
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2020 Oct 17
10
[RFC] treewide: cleanup unreachable breaks
...--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -318,31 +318,26 @@ static void imx_uart_writel(struct imx_port *sport, u32 val, u32 offset)
static u32 imx_uart_readl(struct imx_port *sport, u32 offset)
{
switch (offset) {
case UCR1:
return sport->ucr1;
- break;
case UCR2:
/*
* UCR2_SRST is the only bit in the cached registers that might
* differ from the value that was last written. As it only
* automatically becomes one after being cleared, reread
* conditionally.
*/
if (!(sport->ucr2 & UCR2_SRST))
sport->ucr2 = readl(sport-...
2020 Oct 17
10
[RFC] treewide: cleanup unreachable breaks
...--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -318,31 +318,26 @@ static void imx_uart_writel(struct imx_port *sport, u32 val, u32 offset)
static u32 imx_uart_readl(struct imx_port *sport, u32 offset)
{
switch (offset) {
case UCR1:
return sport->ucr1;
- break;
case UCR2:
/*
* UCR2_SRST is the only bit in the cached registers that might
* differ from the value that was last written. As it only
* automatically becomes one after being cleared, reread
* conditionally.
*/
if (!(sport->ucr2 & UCR2_SRST))
sport->ucr2 = readl(sport-...