Displaying 8 results from an estimated 8 matches for "ucontrol".
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2007 Oct 26
2
Implementation of a Speex based hardware VOCODER
...oard
(also a very expensive one) with a bit rate of 4800bps. When I found this
project, I tought the vocoder hardware could be implemented based on the Speex
code, since it works with similar bitrates.
Is speex suitable for that? What are the main hindrances? I thought in
using some high speed uController (code would be implemented in C and ASM), or
a low cost FPGA (in wich the vocoder would be implemented in some hardware
description language, such as VHDL); what do you thing about this?
Thanks in advance. Wishing to hear from you soon,
Andr? Melo Carvalhais Dutra.
2010 Jan 10
1
[LLVMdev] building a llvm-arm-elf crosscompiler on OSX 10.5
...: ProcNoItin<"arm940t", [ArchV4T]>;
def : ProcNoItin<"ep9312", [ArchV4T]>;
I would like to understand if LLVM can be used for ArchV4T or not.
Could you please indicate specific documentation for llvm ARM codegen?
Does anybody use llvm with arm7tdmi ucontroller (e.g. at91sam7xxx)
Thank you again for your help,
pz
2010/1/10 Anton Korobeynikov <anton at korobeynikov.info>:
> Hello, Pazzo
>
>> Any clue?
> Yes. Sorry, my fault - next time I should check ARM docs before replying.
> ARM7TDMI is ARMv4T and this is not supported by L...
2010 Jan 10
0
[LLVMdev] building a llvm-arm-elf crosscompiler on OSX 10.5
Hello, Pazzo
> Any clue?
Yes. Sorry, my fault - next time I should check ARM docs before replying.
ARM7TDMI is ARMv4T and this is not supported by LLVM (LLVM does v5+ codegen).
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2013 Apr 24
0
EMC Clariion stanby power supply
...I'd share what I've learnt.
It has a serial interface in the form of a RJ12 connector.
Pinout:
1: GND
2:
3:
4:
5: Rx on Host
6: Tx on Host
I think the other pins are used for simple level signals.
Invalid commands are met with a "?" responce.
>From the firmware in the PIC uController I've discovered the following commands
(the "?" is part of the command):
PTR
NTR
ENABLE
COND?
STATUS?
MFG?
STOP
BATTEST
BATTEST?
EMOFF
PN?
SN?
REV?
Command meanings:
Command: PTR
Example Responce:
Comment: Unknown, no reponce recieved
Command: NTR
Example Responce:...
2004 Aug 06
0
Re: Fixed-point Speex
...are with pipelines, unrolling loops, etc. At the moment most of the
proprietary codecs with which I am familiar are targeted to the T.I.
DSP's. That means that Analog Devices and ARM are "one down"
competitively ... they desperately need a codec that's been optimized
for their ucontrollers. I'll bet we could get some early support ...
hardware, software, and maybe even $$ from them and I'd be willing to
make the approach (can you say Blackfin from Analog Devices?). I
think that mine is a particularly interesting proposition because the
Embedded Systems Conference is c...
2010 Jan 10
2
[LLVMdev] building a llvm-arm-elf crosscompiler on OSX 10.5
Dear Anton,
Thank you again for your help!
I tried with the following options (adding --with-cpu=arm7tdmi and
using binutils from cvs snapshot):
../llvm-gcc4.2-2.6.source/configure
--prefix=/usr/local/cross-llvm-gcc-arm-elf-4.2-2.6
--program-prefix=llvm-
--enable-llvm=/Users/dummy/Develop/llvm/llvm-build
--enable-languages=c,c++ --host=i686-apple-darwin9
--build=i686-apple-darwin9
2019 Aug 09
117
[RFC PATCH v6 00/92] VM introspection
The KVM introspection subsystem provides a facility for applications running
on the host or in a separate VM, to control the execution of other VM-s
(pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.),
alter the page access bits in the shadow page tables (only for the hardware
backed ones, eg. Intel's EPT) and receive notifications when events of
interest have taken place
2019 Aug 09
117
[RFC PATCH v6 00/92] VM introspection
The KVM introspection subsystem provides a facility for applications running
on the host or in a separate VM, to control the execution of other VM-s
(pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.),
alter the page access bits in the shadow page tables (only for the hardware
backed ones, eg. Intel's EPT) and receive notifications when events of
interest have taken place