Displaying 11 results from an estimated 11 matches for "u_iov".
2013 Jul 29
0
[PATCH 3/5] Intel MIC Host Driver Changes for Virtio Devices.
...tic int _mic_virtio_copy(struct mic_vdev *mvdev,
> + struct mic_copy *copy, bool chain)
> +{
> + struct mic_vring *vr;
> + struct vring_desc *desc;
> + u32 desc_idx = copy->desc_idx;
> + int ret = 0, iovcnt = copy->iovcnt;
> + struct iovec iov;
> + struct iovec __user *u_iov = copy->iov;
> + u32 rem_ulen, rem_dlen, len, doff;
> + void __user *ubuf = NULL;
> +
> + vr = &mvdev->vring[copy->vr_idx];
> + desc = vr->vr.desc;
> + copy->out_len = 0;
> + rem_dlen = le32_to_cpu(desc[desc_idx].len);
> + rem_ulen = 0;
> + doff = 0;
&g...
2013 Jul 25
1
[PATCH 3/5] Intel MIC Host Driver Changes for Virtio Devices.
...iptor chain and issue the copies */
+static int _mic_virtio_copy(struct mic_vdev *mvdev,
+ struct mic_copy *copy, bool chain)
+{
+ struct mic_vring *vr;
+ struct vring_desc *desc;
+ u32 desc_idx = copy->desc_idx;
+ int ret = 0, iovcnt = copy->iovcnt;
+ struct iovec iov;
+ struct iovec __user *u_iov = copy->iov;
+ u32 rem_ulen, rem_dlen, len, doff;
+ void __user *ubuf = NULL;
+
+ vr = &mvdev->vring[copy->vr_idx];
+ desc = vr->vr.desc;
+ copy->out_len = 0;
+ rem_dlen = le32_to_cpu(desc[desc_idx].len);
+ rem_ulen = 0;
+ doff = 0;
+
+ while (iovcnt && desc_idx != -1U) {...
2013 Jul 25
1
[PATCH 3/5] Intel MIC Host Driver Changes for Virtio Devices.
...iptor chain and issue the copies */
+static int _mic_virtio_copy(struct mic_vdev *mvdev,
+ struct mic_copy *copy, bool chain)
+{
+ struct mic_vring *vr;
+ struct vring_desc *desc;
+ u32 desc_idx = copy->desc_idx;
+ int ret = 0, iovcnt = copy->iovcnt;
+ struct iovec iov;
+ struct iovec __user *u_iov = copy->iov;
+ u32 rem_ulen, rem_dlen, len, doff;
+ void __user *ubuf = NULL;
+
+ vr = &mvdev->vring[copy->vr_idx];
+ desc = vr->vr.desc;
+ copy->out_len = 0;
+ rem_dlen = le32_to_cpu(desc[desc_idx].len);
+ rem_ulen = 0;
+ doff = 0;
+
+ while (iovcnt && desc_idx != -1U) {...
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
card based on the Intel Many Integrated Core (MIC) architecture
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
implements the three required standard address spaces i.e. configuration,
memory and I/O. The host OS loads a device driver as is typical for
PCIe devices. The card itself runs a bootstrap after
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
card based on the Intel Many Integrated Core (MIC) architecture
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
implements the three required standard address spaces i.e. configuration,
memory and I/O. The host OS loads a device driver as is typical for
PCIe devices. The card itself runs a bootstrap after
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Aug 08
10
[PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v1 => v2:
a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring
into 3 smaller patches and function renames, as per feedback from
Greg Kroah-Hartman.
b) Use VRINGH infrastructure for accessing virtio rings from the host
in patch 5, as per feedback from Michael S. Tsirkin.
v1: Initial post @ https://lkml.org/lkml/2013/7/24/810
Description:
2013 Aug 08
10
[PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v1 => v2:
a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring
into 3 smaller patches and function renames, as per feedback from
Greg Kroah-Hartman.
b) Use VRINGH infrastructure for accessing virtio rings from the host
in patch 5, as per feedback from Michael S. Tsirkin.
v1: Initial post @ https://lkml.org/lkml/2013/7/24/810
Description: