Displaying 4 results from an estimated 4 matches for "tzcnt".
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lzcnt
2011 Nov 30
0
[PATCH 3/4] x86/emulator: properly handle lzcnt and tzcnt
...rate_exception_if(!vcpu_has(leaf, reg, bit, ctxt, ops), EXC_UD, -1)
#define vcpu_must_have_mmx() vcpu_must_have(0x00000001, EDX, 23)
@@ -4357,13 +4360,24 @@ x86_emulate(
dst.val = (uint8_t)src.val;
break;
- case 0xbc: /* bsf */ {
- int zf;
+ case 0xbc: /* bsf or tzcnt */ {
+ bool_t zf;
asm ( "bsf %2,%0; setz %b1"
: "=r" (dst.val), "=q" (zf)
- : "r" (src.val), "1" (0) );
+ : "r" (src.val) );
_regs.eflags &= ~EFLG_ZF;
- if ( zf )...
2017 Jan 23
2
Early legalization pass ? Doing early legalization in an existing pass ?
...orted by the
backend would benefit from having the optimizer pass on them. I noticed
some example trying to optimize various pieces of code over the past weeks.
One offender is the cttz/ctlz intrinsic when defined on 0. On X86, BSR and
NSF are undefined on 0, and only recent CPU have the LZCNT and TZCNT
instructions that are properly defined for 0. The backend insert code with
a branch that checks for 0 and use bsf/bsr or just use a constant.
But if we are to branch anyway, and one path of the branch set the value as
a constant, there are some obvious optimization which can be done, starting
with...
2017 Jan 24
3
Early legalization pass ? Doing early legalization in an existing pass ?
...nefit from having the optimizer pass on them. I noticed
> some example trying to optimize various pieces of code over the past weeks.
> >
> > One offender is the cttz/ctlz intrinsic when defined on 0. On X86, BSR
> and NSF are undefined on 0, and only recent CPU have the LZCNT and TZCNT
> instructions that are properly defined for 0. The backend insert code with
> a branch that checks for 0 and use bsf/bsr or just use a constant.
> >
> > But if we are to branch anyway, and one path of the branch set the value
> as a constant, there are some obvious optimizatio...
2018 Jan 29
0
LLVM Weekly - #213, Jan 29th 2018
...248).
* The AggressiveInstCombine pass has been introduced. This differs from
InstCombine in that it can contain optimisations with greater than O(1)
complexity. [r323321](http://reviews.llvm.org/rL323321).
* A series of refactoring patches have enabled false dependencies for X86
POPCNT, LZCN and TZCNT to be broken.
[r323096](http://reviews.llvm.org/rL323096).
* llvm-extract gained support for extracting a basic block from a function.
[r323266](http://reviews.llvm.org/rL323266).
* SelectionDAGISel now prints the current node before calling select, meaning
targets don't have to add this logi...