Displaying 7 results from an estimated 7 matches for "typewidenvector".
2012 Feb 29
2
[LLVMdev] Expand vector type
James,
Thanks for your response. I'm working in LLVM 2.7 (I know, it's old) and the default behavior is already promote. This means that for example a call to DAGTypeLegalizer::getTypeAction(v3i32) in my case and I presume in ARM NEON returns TypeWidenVector. From here legalization calls WidenVectorOperand() to process the STORE node and follows the call chain I have on my original email to FindMemType().
If my analysis is correct then your v316 STOREs are being broken into multiple ones depending on ARM NEON support. Can you please confirm?
Thanks,...
2013 Aug 13
1
[LLVMdev] vector type legalization
...NumElts = (unsigned)NextPowerOf2(NumElts);
EVT NVT = EVT::getVectorVT(Context, EltVT, NumElts);
+ while (!isTypeLegal(NVT)) {
+ NumElts = (unsigned)NextPowerOf2(NumElts);
+ NVT = EVT::getVectorVT(Context, EltVT, NumElts);
+ }
return LegalizeKind(TypeWidenVector, NVT);
}
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On
Behalf Of Nadav Rotem
Sent: Monday, August 12, 2013 1:59 PM
To: Redmond, Paul
Cc: LLVM Developers Mailing List
Subject: Re: [LLVMdev] vector type legalization
This is a bug in the implementation of Wi...
2012 Mar 05
0
[LLVMdev] Expand vector type
....edu
Subject: Re: [LLVMdev] Expand vector type
James,
Thanks for your response. I'm working in LLVM 2.7 (I know, it's old) and the default behavior is already promote. This means that for example a call to DAGTypeLegalizer::getTypeAction(v3i32) in my case and I presume in ARM NEON returns TypeWidenVector. From here legalization calls WidenVectorOperand() to process the STORE node and follows the call chain I have on my original email to FindMemType().
If my analysis is correct then your v316 STOREs are being broken into multiple ones depending on ARM NEON support. Can you please confirm?
Thanks,...
2012 Mar 05
1
[LLVMdev] Expand vector type
...v] Expand vector type
>
> James,
>
> Thanks for your response. I’m working in LLVM 2.7 (I know, it’s old) and the
> default behavior is already promote. This means that for example a call to
> DAGTypeLegalizer::getTypeAction(v3i32) in my case and I presume in ARM NEON
> returns TypeWidenVector. From here legalization calls WidenVectorOperand() to
> process the STORE node and follows the call chain I have on my original email to
> FindMemType().
>
> If my analysis is correct then your v316 STOREs are being broken into multiple
> ones depending on ARM NEON support. Can you p...
2013 Aug 13
0
[LLVMdev] vector type legalization
...werOf2(NumElts);
> EVT NVT = EVT::getVectorVT(Context, EltVT, NumElts);
> + while (!isTypeLegal(NVT)) {
> + NumElts = (unsigned)NextPowerOf2(NumElts);
> + NVT = EVT::getVectorVT(Context, EltVT, NumElts);
> + }
> return LegalizeKind(TypeWidenVector, NVT);
> }
>
>
Your patch is incorrect. We first need to widen to the next power of two. Regardless if this is a legal type or not.
Thanks,
Nadav
2012 Feb 29
0
[LLVMdev] Expand vector type
Hi,
* Is there a way to setup LLVM to automatically convert vec3s to vec4s?
Yes, if you specify v3i16 and friends as "promote" instead of "legal", llvm
will promote it to a v4i16. The ARM NEON backend does this already. I'm
surprised you haven't got this happening already as you mention that LLVM
widens your loads to 4-element vectors. (this should happen during
2012 Feb 29
2
[LLVMdev] Expand vector type
Hello,
My input language has support for 3 and 4 element vectors but my target only has support for the latter. The language defines vec3 with the same storage space as vec4 so from a backend perspective they are both the same. I'd really like if I could have LLVM treat vec3 as vec4 but I haven't found out how.
Currently the target has emulated support for vec3 through LLVM. Loads are