search for: typeswitch

...x3d9aa80, 0x3d9ac80<LD8[getelementptr inbounds ([10000 x i64]* @array, i32 0, i64 63)]> [ORD=2] [ID=6] Initial Opcode index to 813 Skipped scope entry (due to false predicate) at index 822, continuing at 876 Skipped scope entry (due to false predicate) at index 877, continuing at 931 TypeSwitch[i64] from 934 to 937 Morphed node: 0x3d9ad80: i64,ch = LDWri 0x3d9a880, 0x3d9ab80, 0x3d866f8<Mem:LD8[getelementptr inbounds ([10000 x i64]* @array, i32 0, i64 63)]> [ORD=2] ISEL: Match complete! ===== Instruction selection ends: Here is the Instruction Selection for size 64: ISEL: Match...

Hi, I've been trying to teach LLVM that pointers are 128-bit long, which segfaults with some seemingly unrelated stacktrace when I try to take an address of a variable. Since stack saving and loading seems to work fine, I dare to assume the instruction causing problems there is leaq. Now I've done a search for leaq of the entire LLVM codebase with no success and I'd like to know which

...tConstant:i16<4>, TargetConstant:i16<0>, t39:1 t42: f32,ch,glue = CLPISD::COPY_TO_CALLER_A t41, TargetFrameIndex:i16<0>, t41:1 t43: ch = CLPISD::RET_FLAG t42:1 ISEL: Starting pattern match on root node: t50: i32 = Constant<1065353216> Initial Opcode index to 415 TypeSwitch[i32] from 416 to 432 Morphed node: t50: i32 = MOVSUTO_A_iSLo TargetConstant:i32<1065353216> def : Pat<(f32 fpimm:$imm), (MOVSUTO_A_iSLo (bitcast_fpimm_to_i32 f32:$imm))>; def : Pat<(i32 imm:$imm), (MOVSUTO_A_iSLo (trunc_imm i32:$imm)...

...39:1 > > t42: f32,ch,glue = CLPISD::COPY_TO_CALLER_A t41, > TargetFrameIndex:i16<0>, t41:1 > > t43: ch = CLPISD::RET_FLAG t42:1 > > ISEL: Starting pattern match on root node: t50: i32 = Constant<1065353216> > >   Initial Opcode index to 415 > >   TypeSwitch[i32] from 416 to 432 > > Morphed node: t50: i32 = MOVSUTO_A_iSLo TargetConstant:i32<1065353216> > > def: Pat<(f32 fpimm:$imm), > >                         (MOVSUTO_A_iSLo (bitcast_fpimm_to_i32 f32:$imm))>; > > def: Pat<(i32 imm:$imm), > >         ...

Hi, Is there a kind of scope mechanism in the instruction lowering pattern language in order to control where instructions are inserted or how they are later reordered during the SelectionDiag linearization? I know the glue chain that stick instructions together. But such mechanism in not provided in instruction lowering pattern. I'm facing many situations where some patterns are lowered into

...gt; > t42: f32,ch,glue = CLPISD::COPY_TO_CALLER_A t41, > TargetFrameIndex:i16<0>, t41:1 > > t43: ch = CLPISD::RET_FLAG t42:1 > > ISEL: Starting pattern match on root node: t50: i32 = > Constant<1065353216> > >   Initial Opcode index to 415 > >   TypeSwitch[i32] from 416 to 432 > > Morphed node: t50: i32 = MOVSUTO_A_iSLo TargetConstant:i32<1065353216> > > def: Pat<(f32 fpimm:$imm), > >                         (MOVSUTO_A_iSLo (bitcast_fpimm_to_i32 > f32:$imm))>; > > def: Pat<(i32 imm:$imm), > >   ...